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Mateusz Kulikowski120800d2016-03-31 23:12:31 +02001/*
2 * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
3 *
4 * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <dm.h>
11#include <power/pmic.h>
12#include <spmi/spmi.h>
13#include <asm/io.h>
14#include <asm/gpio.h>
15#include <linux/bitops.h>
16
17DECLARE_GLOBAL_DATA_PTR;
18
19/* Register offset for each gpio */
20#define REG_OFFSET(x) ((x) * 0x100)
21
22/* Register maps */
23
24/* Type and subtype are shared for all pm8916 peripherals */
25#define REG_TYPE 0x4
26#define REG_SUBTYPE 0x5
27
28#define REG_STATUS 0x08
29#define REG_STATUS_VAL_MASK 0x1
30
31/* MODE_CTL */
Jorge Ramirez-Ortize0cc0b62018-01-10 11:33:51 +010032#define REG_CTL 0x40
Mateusz Kulikowski120800d2016-03-31 23:12:31 +020033#define REG_CTL_MODE_MASK 0x70
34#define REG_CTL_MODE_INPUT 0x00
35#define REG_CTL_MODE_INOUT 0x20
36#define REG_CTL_MODE_OUTPUT 0x10
37#define REG_CTL_OUTPUT_MASK 0x0F
38
39#define REG_DIG_VIN_CTL 0x41
40#define REG_DIG_VIN_VIN0 0
41
42#define REG_DIG_PULL_CTL 0x42
43#define REG_DIG_PULL_NO_PU 0x5
44
45#define REG_DIG_OUT_CTL 0x45
46#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
47#define REG_DIG_OUT_CTL_DRIVE_L 0x1
48
49#define REG_EN_CTL 0x46
50#define REG_EN_CTL_ENABLE (1 << 7)
51
52struct pm8916_gpio_bank {
Tom Riniaa997d12016-04-12 15:11:23 -040053 uint32_t pid; /* Peripheral ID on SPMI bus */
Mateusz Kulikowski120800d2016-03-31 23:12:31 +020054};
55
56static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset,
57 bool input, int value)
58{
59 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
60 uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
61 int ret;
62
63 /* Disable the GPIO */
64 ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL,
65 REG_EN_CTL_ENABLE, 0);
66 if (ret < 0)
67 return ret;
68
69 /* Select the mode */
70 if (input)
71 ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL,
72 REG_CTL_MODE_INPUT);
73 else
74 ret = pmic_reg_write(dev->parent, gpio_base + REG_CTL,
75 REG_CTL_MODE_INOUT | (value ? 1 : 0));
76 if (ret < 0)
77 return ret;
78
79 /* Set the right pull (no pull) */
80 ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_PULL_CTL,
81 REG_DIG_PULL_NO_PU);
82 if (ret < 0)
83 return ret;
84
85 /* Configure output pin drivers if needed */
86 if (!input) {
87 /* Select the VIN - VIN0, pin is input so it doesn't matter */
88 ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_VIN_CTL,
89 REG_DIG_VIN_VIN0);
90 if (ret < 0)
91 return ret;
92
93 /* Set the right dig out control */
94 ret = pmic_reg_write(dev->parent, gpio_base + REG_DIG_OUT_CTL,
95 REG_DIG_OUT_CTL_CMOS |
96 REG_DIG_OUT_CTL_DRIVE_L);
97 if (ret < 0)
98 return ret;
99 }
100
101 /* Enable the GPIO */
102 return pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 0,
103 REG_EN_CTL_ENABLE);
104}
105
106static int pm8916_gpio_direction_input(struct udevice *dev, unsigned offset)
107{
108 return pm8916_gpio_set_direction(dev, offset, true, 0);
109}
110
111static int pm8916_gpio_direction_output(struct udevice *dev, unsigned offset,
112 int value)
113{
114 return pm8916_gpio_set_direction(dev, offset, false, value);
115}
116
117static int pm8916_gpio_get_function(struct udevice *dev, unsigned offset)
118{
119 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
120 uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
121 int reg;
122
123 /* Set the output value of the gpio */
124 reg = pmic_reg_read(dev->parent, gpio_base + REG_CTL);
125 if (reg < 0)
126 return reg;
127
128 switch (reg & REG_CTL_MODE_MASK) {
129 case REG_CTL_MODE_INPUT:
130 return GPIOF_INPUT;
131 case REG_CTL_MODE_INOUT: /* Fallthrough */
132 case REG_CTL_MODE_OUTPUT:
133 return GPIOF_OUTPUT;
134 default:
135 return GPIOF_UNKNOWN;
136 }
137}
138
139static int pm8916_gpio_get_value(struct udevice *dev, unsigned offset)
140{
141 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
142 uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
143 int reg;
144
145 reg = pmic_reg_read(dev->parent, gpio_base + REG_STATUS);
146 if (reg < 0)
147 return reg;
148
149 return !!(reg & REG_STATUS_VAL_MASK);
150}
151
152static int pm8916_gpio_set_value(struct udevice *dev, unsigned offset,
153 int value)
154{
155 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
156 uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
157
158 /* Set the output value of the gpio */
159 return pmic_clrsetbits(dev->parent, gpio_base + REG_CTL,
160 REG_CTL_OUTPUT_MASK, !!value);
161}
162
163static const struct dm_gpio_ops pm8916_gpio_ops = {
164 .direction_input = pm8916_gpio_direction_input,
165 .direction_output = pm8916_gpio_direction_output,
166 .get_value = pm8916_gpio_get_value,
167 .set_value = pm8916_gpio_set_value,
168 .get_function = pm8916_gpio_get_function,
169};
170
171static int pm8916_gpio_probe(struct udevice *dev)
172{
173 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
174 int reg;
175
Simon Glass04048d52017-05-18 20:10:01 -0600176 priv->pid = dev_read_addr(dev);
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200177 if (priv->pid == FDT_ADDR_T_NONE)
178 return -EINVAL;
179
180 /* Do a sanity check */
181 reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE);
182 if (reg != 0x10)
183 return -ENODEV;
184
185 reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE);
Jorge Ramirez-Ortize0cc0b62018-01-10 11:33:51 +0100186 if (reg != 0x5 && reg != 0x1)
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200187 return -ENODEV;
188
189 return 0;
190}
191
192static int pm8916_gpio_ofdata_to_platdata(struct udevice *dev)
193{
194 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
195
Simon Glass04048d52017-05-18 20:10:01 -0600196 uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0);
197 uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200198 if (uc_priv->bank_name == NULL)
199 uc_priv->bank_name = "pm8916";
200
201 return 0;
202}
203
204static const struct udevice_id pm8916_gpio_ids[] = {
205 { .compatible = "qcom,pm8916-gpio" },
Jorge Ramirez-Ortize0cc0b62018-01-10 11:33:51 +0100206 { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200207 { }
208};
209
210U_BOOT_DRIVER(gpio_pm8916) = {
211 .name = "gpio_pm8916",
212 .id = UCLASS_GPIO,
213 .of_match = pm8916_gpio_ids,
214 .ofdata_to_platdata = pm8916_gpio_ofdata_to_platdata,
215 .probe = pm8916_gpio_probe,
216 .ops = &pm8916_gpio_ops,
217 .priv_auto_alloc_size = sizeof(struct pm8916_gpio_bank),
218};
219
220
221/* Add pmic buttons as GPIO as well - there is no generic way for now */
222#define PON_INT_RT_STS 0x10
223#define KPDPWR_ON_INT_BIT 0
224#define RESIN_ON_INT_BIT 1
225
226static int pm8941_pwrkey_get_function(struct udevice *dev, unsigned offset)
227{
228 return GPIOF_INPUT;
229}
230
231static int pm8941_pwrkey_get_value(struct udevice *dev, unsigned offset)
232{
233 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
234
235 int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS);
236
237 if (reg < 0)
238 return 0;
239
240 switch (offset) {
241 case 0: /* Power button */
242 return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0;
243 break;
244 case 1: /* Reset button */
245 default:
246 return (reg & BIT(RESIN_ON_INT_BIT)) != 0;
247 break;
248 }
249}
250
251static const struct dm_gpio_ops pm8941_pwrkey_ops = {
252 .get_value = pm8941_pwrkey_get_value,
253 .get_function = pm8941_pwrkey_get_function,
254};
255
256static int pm8941_pwrkey_probe(struct udevice *dev)
257{
258 struct pm8916_gpio_bank *priv = dev_get_priv(dev);
259 int reg;
260
Simon Glassa821c4a2017-05-17 17:18:05 -0600261 priv->pid = devfdt_get_addr(dev);
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200262 if (priv->pid == FDT_ADDR_T_NONE)
263 return -EINVAL;
264
265 /* Do a sanity check */
266 reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE);
267 if (reg != 0x1)
268 return -ENODEV;
269
270 reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE);
271 if (reg != 0x1)
272 return -ENODEV;
273
274 return 0;
275}
276
277static int pm8941_pwrkey_ofdata_to_platdata(struct udevice *dev)
278{
279 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
280
281 uc_priv->gpio_count = 2;
Jorge Ramirez-Ortize0cc0b62018-01-10 11:33:51 +0100282 uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200283 if (uc_priv->bank_name == NULL)
284 uc_priv->bank_name = "pm8916_key";
285
286 return 0;
287}
288
289static const struct udevice_id pm8941_pwrkey_ids[] = {
290 { .compatible = "qcom,pm8916-pwrkey" },
Jorge Ramirez-Ortize0cc0b62018-01-10 11:33:51 +0100291 { .compatible = "qcom,pm8994-pwrkey" },
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200292 { }
293};
294
295U_BOOT_DRIVER(pwrkey_pm8941) = {
296 .name = "pwrkey_pm8916",
297 .id = UCLASS_GPIO,
298 .of_match = pm8941_pwrkey_ids,
299 .ofdata_to_platdata = pm8941_pwrkey_ofdata_to_platdata,
300 .probe = pm8941_pwrkey_probe,
301 .ops = &pm8941_pwrkey_ops,
302 .priv_auto_alloc_size = sizeof(struct pm8916_gpio_bank),
303};