blob: 76fc2eff60752536f39ceb5213d2f091922b97c1 [file] [log] [blame]
Simon Glasse1227762016-01-21 19:43:30 -07001/*
2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 *
5 * Based on Rockchip's drivers/power/pmic/pmic_rk808.c:
6 * Copyright (C) 2012 rockchips
7 * zyw <zyw@rock-chips.com>
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#include <common.h>
13#include <dm.h>
14#include <errno.h>
Jacob Chen453c5a92017-05-02 14:54:52 +080015#include <power/rk8xx_pmic.h>
Simon Glasse1227762016-01-21 19:43:30 -070016#include <power/pmic.h>
17#include <power/regulator.h>
18
19#ifndef CONFIG_SPL_BUILD
20#define ENABLE_DRIVER
21#endif
22
Jacob Chenb049acc2017-05-02 14:54:50 +080023/* Field Definitions */
24#define RK808_BUCK_VSEL_MASK 0x3f
25#define RK808_BUCK4_VSEL_MASK 0xf
26#define RK808_LDO_VSEL_MASK 0x1f
27
Jacob Cheneff4ca72017-05-02 14:54:51 +080028#define RK818_BUCK_VSEL_MASK 0x3f
29#define RK818_BUCK4_VSEL_MASK 0x1f
30#define RK818_LDO_VSEL_MASK 0x1f
31#define RK818_LDO3_ON_VSEL_MASK 0xf
32#define RK818_BOOST_ON_VSEL_MASK 0xe0
Wadim Egorovad98f882017-06-19 12:36:39 +020033#define RK818_USB_ILIM_SEL_MASK 0x0f
34#define RK818_USB_CHG_SD_VSEL_MASK 0x70
35
Jacob Cheneff4ca72017-05-02 14:54:51 +080036
Jacob Chen453c5a92017-05-02 14:54:52 +080037struct rk8xx_reg_info {
Simon Glasse1227762016-01-21 19:43:30 -070038 uint min_uv;
39 uint step_uv;
40 s8 vsel_reg;
Jacob Chenb049acc2017-05-02 14:54:50 +080041 u8 vsel_mask;
Simon Glasse1227762016-01-21 19:43:30 -070042};
43
Jacob Chen453c5a92017-05-02 14:54:52 +080044static const struct rk8xx_reg_info rk808_buck[] = {
Jacob Chenb049acc2017-05-02 14:54:50 +080045 { 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
46 { 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
47 { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
48 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
Simon Glasse1227762016-01-21 19:43:30 -070049};
50
Wadim Egorov8926c2f2017-06-19 12:36:38 +020051static const struct rk8xx_reg_info rk818_buck[] = {
52 { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
53 { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
54 { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
55 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
56};
57
58#ifdef ENABLE_DRIVER
Jacob Chen453c5a92017-05-02 14:54:52 +080059static const struct rk8xx_reg_info rk808_ldo[] = {
Jacob Chenb049acc2017-05-02 14:54:50 +080060 { 1800000, 100000, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
61 { 1800000, 100000, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
62 { 800000, 100000, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
63 { 1800000, 100000, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
64 { 1800000, 100000, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
65 { 800000, 100000, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
66 { 800000, 100000, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
67 { 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
Simon Glasse1227762016-01-21 19:43:30 -070068};
69
Jacob Chen453c5a92017-05-02 14:54:52 +080070static const struct rk8xx_reg_info rk818_ldo[] = {
Jacob Cheneff4ca72017-05-02 14:54:51 +080071 { 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
72 { 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
73 { 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
74 { 1800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
75 { 1800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
76 { 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
77 { 800000, 100000, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
78 { 1800000, 100000, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
79};
Wadim Egorov8926c2f2017-06-19 12:36:38 +020080#endif
Jacob Cheneff4ca72017-05-02 14:54:51 +080081
Wadim Egorovad98f882017-06-19 12:36:39 +020082static const u16 rk818_chrg_cur_input_array[] = {
83 450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
84};
85
86static const uint rk818_chrg_shutdown_vsel_array[] = {
87 2780000, 2850000, 2920000, 2990000, 3060000, 3130000, 3190000, 3260000
88};
89
Jacob Chen453c5a92017-05-02 14:54:52 +080090static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
Jacob Cheneff4ca72017-05-02 14:54:51 +080091 int num)
92{
Jacob Chen453c5a92017-05-02 14:54:52 +080093 struct rk8xx_priv *priv = dev_get_priv(pmic);
94 switch (priv->variant) {
Jacob Cheneff4ca72017-05-02 14:54:51 +080095 case RK818_ID:
96 return &rk818_buck[num];
97 default:
98 return &rk808_buck[num];
99 }
100}
101
Simon Glasse1227762016-01-21 19:43:30 -0700102static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
103{
Jacob Chen453c5a92017-05-02 14:54:52 +0800104 const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck - 1);
Jacob Chenb049acc2017-05-02 14:54:50 +0800105 int mask = info->vsel_mask;
Simon Glasse1227762016-01-21 19:43:30 -0700106 int val;
107
108 if (info->vsel_reg == -1)
109 return -ENOSYS;
110 val = (uvolt - info->min_uv) / info->step_uv;
111 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
112 val);
113
114 return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
115}
116
117static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
118{
119 uint mask;
120 int ret;
121
122 buck--;
123 mask = 1 << buck;
124 if (enable) {
Jacob Chen1daa93c2017-05-02 14:54:48 +0800125 ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
Simon Glasse1227762016-01-21 19:43:30 -0700126 if (ret)
127 return ret;
128 ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
129 if (ret)
130 return ret;
131 }
132
133 return pmic_clrsetbits(pmic, REG_DCDC_EN, mask, enable ? mask : 0);
134}
135
136#ifdef ENABLE_DRIVER
Wadim Egorov8926c2f2017-06-19 12:36:38 +0200137static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
138 int num)
139{
140 struct rk8xx_priv *priv = dev_get_priv(pmic);
141 switch (priv->variant) {
142 case RK818_ID:
143 return &rk818_ldo[num];
144 default:
145 return &rk808_ldo[num];
146 }
147}
148
Simon Glasse1227762016-01-21 19:43:30 -0700149static int buck_get_value(struct udevice *dev)
150{
151 int buck = dev->driver_data - 1;
Jacob Chen453c5a92017-05-02 14:54:52 +0800152 const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck);
Jacob Chenb049acc2017-05-02 14:54:50 +0800153 int mask = info->vsel_mask;
Simon Glasse1227762016-01-21 19:43:30 -0700154 int ret, val;
155
156 if (info->vsel_reg == -1)
157 return -ENOSYS;
158 ret = pmic_reg_read(dev->parent, info->vsel_reg);
159 if (ret < 0)
160 return ret;
161 val = ret & mask;
162
163 return info->min_uv + val * info->step_uv;
164}
165
166static int buck_set_value(struct udevice *dev, int uvolt)
167{
168 int buck = dev->driver_data;
169
170 return _buck_set_value(dev->parent, buck, uvolt);
171}
172
173static int buck_set_enable(struct udevice *dev, bool enable)
174{
175 int buck = dev->driver_data;
176
177 return _buck_set_enable(dev->parent, buck, enable);
178}
179
Keerthy585c7032017-06-13 09:53:52 +0530180static int buck_get_enable(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700181{
182 int buck = dev->driver_data - 1;
183 int ret;
184 uint mask;
185
186 mask = 1 << buck;
187
188 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
189 if (ret < 0)
190 return ret;
191
192 return ret & mask ? true : false;
193}
194
195static int ldo_get_value(struct udevice *dev)
196{
197 int ldo = dev->driver_data - 1;
Jacob Chen453c5a92017-05-02 14:54:52 +0800198 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
Jacob Chenb049acc2017-05-02 14:54:50 +0800199 int mask = info->vsel_mask;
Simon Glasse1227762016-01-21 19:43:30 -0700200 int ret, val;
201
202 if (info->vsel_reg == -1)
203 return -ENOSYS;
204 ret = pmic_reg_read(dev->parent, info->vsel_reg);
205 if (ret < 0)
206 return ret;
207 val = ret & mask;
208
209 return info->min_uv + val * info->step_uv;
210}
211
212static int ldo_set_value(struct udevice *dev, int uvolt)
213{
214 int ldo = dev->driver_data - 1;
Jacob Chen453c5a92017-05-02 14:54:52 +0800215 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
Jacob Chenb049acc2017-05-02 14:54:50 +0800216 int mask = info->vsel_mask;
Simon Glasse1227762016-01-21 19:43:30 -0700217 int val;
218
219 if (info->vsel_reg == -1)
220 return -ENOSYS;
221 val = (uvolt - info->min_uv) / info->step_uv;
222 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
223 val);
224
225 return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
226}
227
228static int ldo_set_enable(struct udevice *dev, bool enable)
229{
230 int ldo = dev->driver_data - 1;
231 uint mask;
232
233 mask = 1 << ldo;
234
235 return pmic_clrsetbits(dev->parent, REG_LDO_EN, mask,
236 enable ? mask : 0);
237}
238
Keerthy585c7032017-06-13 09:53:52 +0530239static int ldo_get_enable(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700240{
241 int ldo = dev->driver_data - 1;
242 int ret;
243 uint mask;
244
245 mask = 1 << ldo;
246
247 ret = pmic_reg_read(dev->parent, REG_LDO_EN);
248 if (ret < 0)
249 return ret;
250
251 return ret & mask ? true : false;
252}
253
254static int switch_set_enable(struct udevice *dev, bool enable)
255{
256 int sw = dev->driver_data - 1;
257 uint mask;
258
259 mask = 1 << (sw + 5);
260
261 return pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
262 enable ? mask : 0);
263}
264
Keerthy585c7032017-06-13 09:53:52 +0530265static int switch_get_enable(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700266{
267 int sw = dev->driver_data - 1;
268 int ret;
269 uint mask;
270
271 mask = 1 << (sw + 5);
272
273 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
274 if (ret < 0)
275 return ret;
276
277 return ret & mask ? true : false;
278}
279
Jacob Chen453c5a92017-05-02 14:54:52 +0800280static int rk8xx_buck_probe(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700281{
282 struct dm_regulator_uclass_platdata *uc_pdata;
283
284 uc_pdata = dev_get_uclass_platdata(dev);
285
286 uc_pdata->type = REGULATOR_TYPE_BUCK;
287 uc_pdata->mode_count = 0;
288
289 return 0;
290}
291
Jacob Chen453c5a92017-05-02 14:54:52 +0800292static int rk8xx_ldo_probe(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700293{
294 struct dm_regulator_uclass_platdata *uc_pdata;
295
296 uc_pdata = dev_get_uclass_platdata(dev);
297
298 uc_pdata->type = REGULATOR_TYPE_LDO;
299 uc_pdata->mode_count = 0;
300
301 return 0;
302}
303
Jacob Chen453c5a92017-05-02 14:54:52 +0800304static int rk8xx_switch_probe(struct udevice *dev)
Simon Glasse1227762016-01-21 19:43:30 -0700305{
306 struct dm_regulator_uclass_platdata *uc_pdata;
307
308 uc_pdata = dev_get_uclass_platdata(dev);
309
310 uc_pdata->type = REGULATOR_TYPE_FIXED;
311 uc_pdata->mode_count = 0;
312
313 return 0;
314}
315
Jacob Chen453c5a92017-05-02 14:54:52 +0800316static const struct dm_regulator_ops rk8xx_buck_ops = {
Simon Glasse1227762016-01-21 19:43:30 -0700317 .get_value = buck_get_value,
318 .set_value = buck_set_value,
319 .get_enable = buck_get_enable,
320 .set_enable = buck_set_enable,
321};
322
Jacob Chen453c5a92017-05-02 14:54:52 +0800323static const struct dm_regulator_ops rk8xx_ldo_ops = {
Simon Glasse1227762016-01-21 19:43:30 -0700324 .get_value = ldo_get_value,
325 .set_value = ldo_set_value,
326 .get_enable = ldo_get_enable,
327 .set_enable = ldo_set_enable,
328};
329
Jacob Chen453c5a92017-05-02 14:54:52 +0800330static const struct dm_regulator_ops rk8xx_switch_ops = {
Simon Glasse1227762016-01-21 19:43:30 -0700331 .get_enable = switch_get_enable,
332 .set_enable = switch_set_enable,
333};
334
Jacob Chen453c5a92017-05-02 14:54:52 +0800335U_BOOT_DRIVER(rk8xx_buck) = {
336 .name = "rk8xx_buck",
Simon Glasse1227762016-01-21 19:43:30 -0700337 .id = UCLASS_REGULATOR,
Jacob Chen453c5a92017-05-02 14:54:52 +0800338 .ops = &rk8xx_buck_ops,
339 .probe = rk8xx_buck_probe,
Simon Glasse1227762016-01-21 19:43:30 -0700340};
341
Jacob Chen453c5a92017-05-02 14:54:52 +0800342U_BOOT_DRIVER(rk8xx_ldo) = {
343 .name = "rk8xx_ldo",
Simon Glasse1227762016-01-21 19:43:30 -0700344 .id = UCLASS_REGULATOR,
Jacob Chen453c5a92017-05-02 14:54:52 +0800345 .ops = &rk8xx_ldo_ops,
346 .probe = rk8xx_ldo_probe,
Simon Glasse1227762016-01-21 19:43:30 -0700347};
348
Jacob Chen453c5a92017-05-02 14:54:52 +0800349U_BOOT_DRIVER(rk8xx_switch) = {
350 .name = "rk8xx_switch",
Simon Glasse1227762016-01-21 19:43:30 -0700351 .id = UCLASS_REGULATOR,
Jacob Chen453c5a92017-05-02 14:54:52 +0800352 .ops = &rk8xx_switch_ops,
353 .probe = rk8xx_switch_probe,
Simon Glasse1227762016-01-21 19:43:30 -0700354};
355#endif
356
Jacob Chen453c5a92017-05-02 14:54:52 +0800357int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt)
Simon Glasse1227762016-01-21 19:43:30 -0700358{
359 int ret;
360
361 ret = _buck_set_value(pmic, buck, uvolt);
362 if (ret)
363 return ret;
364
365 return _buck_set_enable(pmic, buck, true);
366}
Wadim Egorovad98f882017-06-19 12:36:39 +0200367
368int rk818_spl_configure_usb_input_current(struct udevice *pmic, int current_ma)
369{
370 uint i;
371
372 for (i = 0; i < ARRAY_SIZE(rk818_chrg_cur_input_array); i++)
373 if (current_ma <= rk818_chrg_cur_input_array[i])
374 break;
375
376 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_ILIM_SEL_MASK, i);
377}
378
379int rk818_spl_configure_usb_chrg_shutdown(struct udevice *pmic, int uvolt)
380{
381 uint i;
382
383 for (i = 0; i < ARRAY_SIZE(rk818_chrg_shutdown_vsel_array); i++)
384 if (uvolt <= rk818_chrg_shutdown_vsel_array[i])
385 break;
386
387 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_CHG_SD_VSEL_MASK,
388 i);
389}