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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha77417102017-04-10 15:02:57 -07002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha77417102017-04-10 15:02:57 -07005 */
6
7#include <common.h>
8#include <clk.h>
9#include <dm.h>
10#include <fdtdec.h>
11#include <asm/arch/gpio.h>
12#include <asm/arch/stm32.h>
13#include <asm/gpio.h>
14#include <asm/io.h>
15#include <linux/errno.h>
16#include <linux/io.h>
17
Vikas Manocha77417102017-04-10 15:02:57 -070018#define STM32_GPIOS_PER_BANK 16
19#define MODE_BITS(gpio_pin) (gpio_pin * 2)
20#define MODE_BITS_MASK 3
Patrice Chotard798cd702018-08-09 11:57:57 +020021#define BSRR_BIT(gpio_pin, value) BIT(gpio_pin + (value ? 0 : 16))
Vikas Manocha77417102017-04-10 15:02:57 -070022
Vikas Manocha77417102017-04-10 15:02:57 -070023static int stm32_gpio_direction_input(struct udevice *dev, unsigned offset)
24{
25 struct stm32_gpio_priv *priv = dev_get_priv(dev);
26 struct stm32_gpio_regs *regs = priv->regs;
27 int bits_index = MODE_BITS(offset);
28 int mask = MODE_BITS_MASK << bits_index;
29
30 clrsetbits_le32(&regs->moder, mask, STM32_GPIO_MODE_IN << bits_index);
31
32 return 0;
33}
34
35static int stm32_gpio_direction_output(struct udevice *dev, unsigned offset,
36 int value)
37{
38 struct stm32_gpio_priv *priv = dev_get_priv(dev);
39 struct stm32_gpio_regs *regs = priv->regs;
40 int bits_index = MODE_BITS(offset);
41 int mask = MODE_BITS_MASK << bits_index;
42
43 clrsetbits_le32(&regs->moder, mask, STM32_GPIO_MODE_OUT << bits_index);
Patrice Chotard798cd702018-08-09 11:57:57 +020044
45 writel(BSRR_BIT(offset, value), &regs->bsrr);
Vikas Manocha77417102017-04-10 15:02:57 -070046
47 return 0;
48}
49
50static int stm32_gpio_get_value(struct udevice *dev, unsigned offset)
51{
52 struct stm32_gpio_priv *priv = dev_get_priv(dev);
53 struct stm32_gpio_regs *regs = priv->regs;
54
Patrice Chotard798cd702018-08-09 11:57:57 +020055 return readl(&regs->idr) & BIT(offset) ? 1 : 0;
Vikas Manocha77417102017-04-10 15:02:57 -070056}
57
58static int stm32_gpio_set_value(struct udevice *dev, unsigned offset, int value)
59{
60 struct stm32_gpio_priv *priv = dev_get_priv(dev);
61 struct stm32_gpio_regs *regs = priv->regs;
Vikas Manocha77417102017-04-10 15:02:57 -070062
Patrice Chotard798cd702018-08-09 11:57:57 +020063 writel(BSRR_BIT(offset, value), &regs->bsrr);
Vikas Manocha77417102017-04-10 15:02:57 -070064
65 return 0;
66}
67
68static const struct dm_gpio_ops gpio_stm32_ops = {
69 .direction_input = stm32_gpio_direction_input,
70 .direction_output = stm32_gpio_direction_output,
71 .get_value = stm32_gpio_get_value,
72 .set_value = stm32_gpio_set_value,
73};
74
75static int gpio_stm32_probe(struct udevice *dev)
76{
77 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
78 struct stm32_gpio_priv *priv = dev_get_priv(dev);
79 fdt_addr_t addr;
Patrick Delaunayd876eaf2018-03-12 10:46:07 +010080 const char *name;
Vikas Manocha77417102017-04-10 15:02:57 -070081
Patrick Delaunayd876eaf2018-03-12 10:46:07 +010082 addr = dev_read_addr(dev);
Vikas Manocha77417102017-04-10 15:02:57 -070083 if (addr == FDT_ADDR_T_NONE)
84 return -EINVAL;
85
86 priv->regs = (struct stm32_gpio_regs *)addr;
Patrick Delaunayd876eaf2018-03-12 10:46:07 +010087 name = dev_read_string(dev, "st,bank-name");
Vikas Manocha77417102017-04-10 15:02:57 -070088 if (!name)
89 return -EINVAL;
90 uc_priv->bank_name = name;
Patrick Delaunayf11c3082018-03-12 10:46:08 +010091 uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios",
92 STM32_GPIOS_PER_BANK);
Vikas Manocha77417102017-04-10 15:02:57 -070093 debug("%s, addr = 0x%p, bank_name = %s\n", __func__, (u32 *)priv->regs,
94 uc_priv->bank_name);
95
96#ifdef CONFIG_CLK
97 struct clk clk;
98 int ret;
99 ret = clk_get_by_index(dev, 0, &clk);
100 if (ret < 0)
101 return ret;
102
103 ret = clk_enable(&clk);
104
105 if (ret) {
106 dev_err(dev, "failed to enable clock\n");
107 return ret;
108 }
109 debug("clock enabled for device %s\n", dev->name);
110#endif
111
112 return 0;
113}
114
115static const struct udevice_id stm32_gpio_ids[] = {
116 { .compatible = "st,stm32-gpio" },
117 { }
118};
119
120U_BOOT_DRIVER(gpio_stm32) = {
121 .name = "gpio_stm32",
122 .id = UCLASS_GPIO,
123 .of_match = stm32_gpio_ids,
124 .probe = gpio_stm32_probe,
125 .ops = &gpio_stm32_ops,
126 .flags = DM_FLAG_PRE_RELOC | DM_UC_FLAG_SEQ_ALIAS,
127 .priv_auto_alloc_size = sizeof(struct stm32_gpio_priv),
128};