blob: cfd77f865361b53feb3a2945ba6a589a1e62417b [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000026
27/* TODO: Can we move these into arch/ headers? */
28#ifdef CONFIG_8xx
29#include <mpc8xx.h>
30#endif
31#ifdef CONFIG_5xx
32#include <mpc5xx.h>
33#endif
34#ifdef CONFIG_MPC5xxx
35#include <mpc5xxx.h>
36#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070037#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070038#include <asm/mp.h>
39#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000040
Simon Glassa733b062013-04-26 02:53:43 +000041#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000042#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000043#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020044#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070045#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000046#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000047#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000048#include <asm/io.h>
49#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000050#ifdef CONFIG_X86
51#include <asm/init_helpers.h>
52#include <asm/relocate.h>
53#endif
Simon Glassa733b062013-04-26 02:53:43 +000054#ifdef CONFIG_SANDBOX
55#include <asm/state.h>
56#endif
Simon Glassab7cd622014-07-23 06:55:04 -060057#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000058#include <linux/compiler.h>
59
60/*
61 * Pointer to initial global data area
62 *
63 * Here we initialize it if needed.
64 */
65#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
66#undef XTRN_DECLARE_GLOBAL_DATA_PTR
67#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
68DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
69#else
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
73/*
74 * sjg: IMO this code should be
75 * refactored to a single function, something like:
76 *
77 * void led_set_state(enum led_colour_t colour, int on);
78 */
79/************************************************************************
80 * Coloured LED functionality
81 ************************************************************************
82 * May be supplied by boards if desired
83 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020084__weak void coloured_LED_init(void) {}
85__weak void red_led_on(void) {}
86__weak void red_led_off(void) {}
87__weak void green_led_on(void) {}
88__weak void green_led_off(void) {}
89__weak void yellow_led_on(void) {}
90__weak void yellow_led_off(void) {}
91__weak void blue_led_on(void) {}
92__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000093
94/*
95 * Why is gd allocated a register? Prior to reloc it might be better to
96 * just pass it around to each function in this file?
97 *
98 * After reloc one could argue that it is hardly used and doesn't need
99 * to be in a register. Or if it is it should perhaps hold pointers to all
100 * global data for all modules, so that post-reloc we can avoid the massive
101 * literal pool we get on ARM. Or perhaps just encourage each module to use
102 * a structure...
103 */
104
105/*
106 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 */
108
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800109#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000110static int init_func_watchdog_init(void)
111{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800112# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
114 defined(CONFIG_SH))
115 hw_watchdog_init();
116# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000117 puts(" Watchdog enabled\n");
118 WATCHDOG_RESET();
119
120 return 0;
121}
122
123int init_func_watchdog_reset(void)
124{
125 WATCHDOG_RESET();
126
127 return 0;
128}
129#endif /* CONFIG_WATCHDOG */
130
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200131__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000132{
133 /* please define platform specific board_add_ram_info() */
134}
135
Simon Glass1938f4a2013-03-11 06:49:53 +0000136static int init_baud_rate(void)
137{
138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
139 return 0;
140}
141
142static int display_text_info(void)
143{
Simon Glassa733b062013-04-26 02:53:43 +0000144#ifndef CONFIG_SANDBOX
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100145 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000146
Simon Glass632efa72013-03-11 07:06:48 +0000147 bss_start = (ulong)&__bss_start;
148 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100149
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800150#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100151 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800152#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100153 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800154#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100155
156 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
157 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000158#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000159
160#ifdef CONFIG_MODEM_SUPPORT
161 debug("Modem Support enabled\n");
162#endif
163#ifdef CONFIG_USE_IRQ
164 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
165 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
166#endif
167
168 return 0;
169}
170
171static int announce_dram_init(void)
172{
173 puts("DRAM: ");
174 return 0;
175}
176
Paul Burton3da7e5a2014-04-07 10:11:20 +0100177#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000178static int init_func_ram(void)
179{
180#ifdef CONFIG_BOARD_TYPES
181 int board_type = gd->board_type;
182#else
183 int board_type = 0; /* use dummy arg */
184#endif
185
186 gd->ram_size = initdram(board_type);
187
188 if (gd->ram_size > 0)
189 return 0;
190
191 puts("*** failed ***\n");
192 return 1;
193}
194#endif
195
Simon Glass1938f4a2013-03-11 06:49:53 +0000196static int show_dram_config(void)
197{
York Sunfa39ffe2014-05-02 17:28:05 -0700198 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000199
200#ifdef CONFIG_NR_DRAM_BANKS
201 int i;
202
203 debug("\nRAM Configuration:\n");
204 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
205 size += gd->bd->bi_dram[i].size;
206 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
207#ifdef DEBUG
208 print_size(gd->bd->bi_dram[i].size, "\n");
209#endif
210 }
211 debug("\nDRAM: ");
212#else
213 size = gd->ram_size;
214#endif
215
Simon Glasse4fef6c2013-03-11 14:30:42 +0000216 print_size(size, "");
217 board_add_ram_info(0);
218 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000219
220 return 0;
221}
222
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200223__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000224{
225#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
226 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
227 gd->bd->bi_dram[0].size = get_effective_memsize();
228#endif
229}
230
Heiko Schocherea818db2013-01-29 08:53:15 +0100231#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000232static int init_func_i2c(void)
233{
234 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200235#ifdef CONFIG_SYS_I2C
236 i2c_init_all();
237#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000238 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200239#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000240 puts("ready\n");
241 return 0;
242}
243#endif
244
245#if defined(CONFIG_HARD_SPI)
246static int init_func_spi(void)
247{
248 puts("SPI: ");
249 spi_init();
250 puts("ready\n");
251 return 0;
252}
253#endif
254
255__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000256static int zero_global_data(void)
257{
258 memset((void *)gd, '\0', sizeof(gd_t));
259
260 return 0;
261}
262
263static int setup_mon_len(void)
264{
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100265#ifdef __ARM__
266 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Simon Glassa733b062013-04-26 02:53:43 +0000267#elif defined(CONFIG_SANDBOX)
268 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800269#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800270 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000271#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000274#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000275 return 0;
276}
277
278__weak int arch_cpu_init(void)
279{
280 return 0;
281}
282
Simon Glassf828bf22013-04-20 08:42:41 +0000283#ifdef CONFIG_OF_HOSTFILE
284
Simon Glassf828bf22013-04-20 08:42:41 +0000285static int read_fdt_from_file(void)
286{
287 struct sandbox_state *state = state_get_current();
Simon Glass95fac6a2014-02-27 13:25:58 -0700288 const char *fname = state->fdt_fname;
Simon Glassf828bf22013-04-20 08:42:41 +0000289 void *blob;
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800290 loff_t size;
Simon Glassf828bf22013-04-20 08:42:41 +0000291 int err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700292 int fd;
Simon Glassf828bf22013-04-20 08:42:41 +0000293
294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
295 if (!state->fdt_fname) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700296 err = fdt_create_empty_tree(blob, 256);
Simon Glassf828bf22013-04-20 08:42:41 +0000297 if (!err)
298 goto done;
Simon Glass95fac6a2014-02-27 13:25:58 -0700299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
300 return -EINVAL;
Simon Glassf828bf22013-04-20 08:42:41 +0000301 }
Simon Glass95fac6a2014-02-27 13:25:58 -0700302
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800303 err = os_get_filesize(fname, &size);
304 if (err < 0) {
Simon Glass95fac6a2014-02-27 13:25:58 -0700305 printf("Failed to file FDT file '%s'\n", fname);
Suriyan Ramasami96b10462014-11-17 14:39:37 -0800306 return err;
Simon Glass95fac6a2014-02-27 13:25:58 -0700307 }
308 fd = os_open(fname, OS_O_RDONLY);
309 if (fd < 0) {
310 printf("Failed to open FDT file '%s'\n", fname);
311 return -EACCES;
312 }
313 if (os_read(fd, blob, size) != size) {
314 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000315 return -EIO;
Simon Glass95fac6a2014-02-27 13:25:58 -0700316 }
317 os_close(fd);
Simon Glassf828bf22013-04-20 08:42:41 +0000318
319done:
320 gd->fdt_blob = blob;
321
322 return 0;
323}
324#endif
325
Simon Glassa733b062013-04-26 02:53:43 +0000326#ifdef CONFIG_SANDBOX
327static int setup_ram_buf(void)
328{
Simon Glass5c2859c2013-11-10 10:27:03 -0700329 struct sandbox_state *state = state_get_current();
330
331 gd->arch.ram_buf = state->ram_buf;
332 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000333
334 return 0;
335}
336#endif
337
Simon Glass1938f4a2013-03-11 06:49:53 +0000338static int setup_fdt(void)
339{
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900340#ifdef CONFIG_OF_CONTROL
341# ifdef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000342 /* Get a pointer to the FDT */
Masahiro Yamada6ab6b2a2014-02-05 11:28:25 +0900343 gd->fdt_blob = __dtb_dt_begin;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900344# elif defined CONFIG_OF_SEPARATE
Simon Glass1938f4a2013-03-11 06:49:53 +0000345 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000346 gd->fdt_blob = (ulong *)&_end;
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900347# elif defined(CONFIG_OF_HOSTFILE)
Simon Glassf828bf22013-04-20 08:42:41 +0000348 if (read_fdt_from_file()) {
349 puts("Failed to read control FDT\n");
350 return -1;
351 }
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900352# endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000353 /* Allow the early environment to override the fdt address */
354 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
355 (uintptr_t)gd->fdt_blob);
Masahiro Yamadac970dff2014-09-06 23:39:00 +0900356#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000357 return 0;
358}
359
360/* Get the top of usable RAM */
361__weak ulong board_get_usable_ram_top(ulong total_size)
362{
363 return gd->ram_top;
364}
365
366static int setup_dest_addr(void)
367{
368 debug("Monitor len: %08lX\n", gd->mon_len);
369 /*
370 * Ram is setup, size stored in gd !!
371 */
372 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
373#if defined(CONFIG_SYS_MEM_TOP_HIDE)
374 /*
375 * Subtract specified amount of memory to hide so that it won't
376 * get "touched" at all by U-Boot. By fixing up gd->ram_size
377 * the Linux kernel should now get passed the now "corrected"
378 * memory size and won't touch it either. This should work
379 * for arch/ppc and arch/powerpc. Only Linux board ports in
380 * arch/powerpc with bootwrapper support, that recalculate the
381 * memory size from the SDRAM controller setup will have to
382 * get fixed.
383 */
384 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
385#endif
386#ifdef CONFIG_SYS_SDRAM_BASE
387 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
388#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000389 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000390 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000391 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000392 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700393#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000394 /*
395 * We need to make sure the location we intend to put secondary core
396 * boot code is reserved and not used by any part of u-boot
397 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000398 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
399 gd->relocaddr = determine_mp_bootpg(NULL);
400 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000401 }
402#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000403 return 0;
404}
405
406#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
407static int reserve_logbuffer(void)
408{
409 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000410 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000411 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000412 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000413 return 0;
414}
415#endif
416
417#ifdef CONFIG_PRAM
418/* reserve protected RAM */
419static int reserve_pram(void)
420{
421 ulong reg;
422
423 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000424 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000425 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000426 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000427 return 0;
428}
429#endif /* CONFIG_PRAM */
430
431/* Round memory pointer down to next 4 kB limit */
432static int reserve_round_4k(void)
433{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000434 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000435 return 0;
436}
437
438#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
439 defined(CONFIG_ARM)
440static int reserve_mmu(void)
441{
442 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800443 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000444 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000445
446 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000447 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000448
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000449 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000450 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
451 gd->arch.tlb_addr + gd->arch.tlb_size);
452 return 0;
453}
454#endif
455
456#ifdef CONFIG_LCD
457static int reserve_lcd(void)
458{
459#ifdef CONFIG_FB_ADDR
460 gd->fb_base = CONFIG_FB_ADDR;
461#else
462 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000463 gd->relocaddr = lcd_setmem(gd->relocaddr);
464 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000465#endif /* CONFIG_FB_ADDR */
466 return 0;
467}
468#endif /* CONFIG_LCD */
469
Simon Glass71c52db2013-06-11 11:14:42 -0700470static int reserve_trace(void)
471{
472#ifdef CONFIG_TRACE
473 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
474 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
475 debug("Reserving %dk for trace data at: %08lx\n",
476 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
477#endif
478
479 return 0;
480}
481
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800482#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
483 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
484 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000485static int reserve_video(void)
486{
487 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000488 gd->relocaddr = video_setmem(gd->relocaddr);
489 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000490
491 return 0;
492}
493#endif
494
Simon Glass1938f4a2013-03-11 06:49:53 +0000495static int reserve_uboot(void)
496{
497 /*
498 * reserve memory for U-Boot code, data & bss
499 * round down to next 4 kB limit
500 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000501 gd->relocaddr -= gd->mon_len;
502 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000503#ifdef CONFIG_E500
504 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000505 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000506#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000507
508 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000509 gd->relocaddr);
510
511 gd->start_addr_sp = gd->relocaddr;
512
Simon Glass1938f4a2013-03-11 06:49:53 +0000513 return 0;
514}
515
Simon Glass8cae8a62013-03-05 14:39:45 +0000516#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000517/* reserve memory for malloc() area */
518static int reserve_malloc(void)
519{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000520 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000521 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000522 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000523 return 0;
524}
525
526/* (permanently) allocate a Board Info struct */
527static int reserve_board(void)
528{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800529 if (!gd->bd) {
530 gd->start_addr_sp -= sizeof(bd_t);
531 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
532 memset(gd->bd, '\0', sizeof(bd_t));
533 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
534 sizeof(bd_t), gd->start_addr_sp);
535 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000536 return 0;
537}
Simon Glass8cae8a62013-03-05 14:39:45 +0000538#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000539
540static int setup_machine(void)
541{
542#ifdef CONFIG_MACH_TYPE
543 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
544#endif
545 return 0;
546}
547
548static int reserve_global_data(void)
549{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000550 gd->start_addr_sp -= sizeof(gd_t);
551 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000552 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000553 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000554 return 0;
555}
556
557static int reserve_fdt(void)
558{
559 /*
560 * If the device tree is sitting immediate above our image then we
561 * must relocate it. If it is embedded in the data section, then it
562 * will be relocated with other data.
563 */
564 if (gd->fdt_blob) {
565 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
566
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000567 gd->start_addr_sp -= gd->fdt_size;
568 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000569 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000570 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000571 }
572
573 return 0;
574}
575
576static int reserve_stacks(void)
577{
Simon Glass8cae8a62013-03-05 14:39:45 +0000578#ifdef CONFIG_SPL_BUILD
579# ifdef CONFIG_ARM
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000580 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
581 gd->irq_sp = gd->start_addr_sp;
Simon Glass8cae8a62013-03-05 14:39:45 +0000582# endif
583#else
Tom Rini94092e32014-11-24 17:20:46 -0500584# ifdef CONFIG_PPC
Simon Glasse4fef6c2013-03-11 14:30:42 +0000585 ulong *s;
586# endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000587
Simon Glass1938f4a2013-03-11 06:49:53 +0000588 /* setup stack pointer for exceptions */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000589 gd->start_addr_sp -= 16;
590 gd->start_addr_sp &= ~0xf;
591 gd->irq_sp = gd->start_addr_sp;
Simon Glass1938f4a2013-03-11 06:49:53 +0000592
593 /*
594 * Handle architecture-specific things here
595 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
596 * to handle this and put in arch/xxx/lib/stack.c
597 */
David Fengcce6be72013-12-14 11:47:36 +0800598# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000599# ifdef CONFIG_USE_IRQ
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000600 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
Simon Glass1938f4a2013-03-11 06:49:53 +0000601 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000602 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000603
604 /* 8-byte alignment for ARM ABI compliance */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000605 gd->start_addr_sp &= ~0x07;
Simon Glass1938f4a2013-03-11 06:49:53 +0000606# endif
607 /* leave 3 words for abort-stack, plus 1 for alignment */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000608 gd->start_addr_sp -= 16;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000609# elif defined(CONFIG_PPC)
610 /* Clear initial stack frame */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000611 s = (ulong *) gd->start_addr_sp;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000612 *s = 0; /* Terminate back chain */
613 *++s = 0; /* NULL return address */
Simon Glass8cae8a62013-03-05 14:39:45 +0000614# endif /* Architecture specific code */
Simon Glass1938f4a2013-03-11 06:49:53 +0000615
616 return 0;
Simon Glass8cae8a62013-03-05 14:39:45 +0000617#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000618}
619
620static int display_new_sp(void)
621{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000622 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000623
624 return 0;
625}
626
Simon Glasse4fef6c2013-03-11 14:30:42 +0000627#ifdef CONFIG_PPC
628static int setup_board_part1(void)
629{
630 bd_t *bd = gd->bd;
631
632 /*
633 * Save local variables to board info struct
634 */
635
636 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
637 bd->bi_memsize = gd->ram_size; /* size in bytes */
638
639#ifdef CONFIG_SYS_SRAM_BASE
640 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
641 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
642#endif
643
Masahiro Yamada58dac322014-03-05 17:40:10 +0900644#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000645 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
646 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
647#endif
648#if defined(CONFIG_MPC5xxx)
649 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
650#endif
651#if defined(CONFIG_MPC83xx)
652 bd->bi_immrbar = CONFIG_SYS_IMMR;
653#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000654
655 return 0;
656}
657
658static int setup_board_part2(void)
659{
660 bd_t *bd = gd->bd;
661
662 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
663 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
664#if defined(CONFIG_CPM2)
665 bd->bi_cpmfreq = gd->arch.cpm_clk;
666 bd->bi_brgfreq = gd->arch.brg_clk;
667 bd->bi_sccfreq = gd->arch.scc_clk;
668 bd->bi_vco = gd->arch.vco_out;
669#endif /* CONFIG_CPM2 */
670#if defined(CONFIG_MPC512X)
671 bd->bi_ipsfreq = gd->arch.ips_clk;
672#endif /* CONFIG_MPC512X */
673#if defined(CONFIG_MPC5xxx)
674 bd->bi_ipbfreq = gd->arch.ipb_clk;
675 bd->bi_pcifreq = gd->pci_clk;
676#endif /* CONFIG_MPC5xxx */
677
678 return 0;
679}
680#endif
681
682#ifdef CONFIG_SYS_EXTBDINFO
683static int setup_board_extra(void)
684{
685 bd_t *bd = gd->bd;
686
687 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
688 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
689 sizeof(bd->bi_r_version));
690
691 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
692 bd->bi_plb_busfreq = gd->bus_clk;
693#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
694 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
695 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
696 bd->bi_pci_busfreq = get_PCI_freq();
697 bd->bi_opbfreq = get_OPB_freq();
698#elif defined(CONFIG_XILINX_405)
699 bd->bi_pci_busfreq = get_PCI_freq();
700#endif
701
702 return 0;
703}
704#endif
705
Simon Glass1938f4a2013-03-11 06:49:53 +0000706#ifdef CONFIG_POST
707static int init_post(void)
708{
709 post_bootmode_init();
710 post_run(NULL, POST_ROM | post_bootmode_get(0));
711
712 return 0;
713}
714#endif
715
Simon Glass1938f4a2013-03-11 06:49:53 +0000716static int setup_dram_config(void)
717{
718 /* Ram is board specific, so move it to board code ... */
719 dram_init_banksize();
720
721 return 0;
722}
723
724static int reloc_fdt(void)
725{
726 if (gd->new_fdt) {
727 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
728 gd->fdt_blob = gd->new_fdt;
729 }
730
731 return 0;
732}
733
734static int setup_reloc(void)
735{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800736#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000737 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800738#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000739 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
740
741 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000742 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000743 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
744 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000745
746 return 0;
747}
748
749/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700750#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000751
752static int jump_to_copy(void)
753{
Simon Glass48a33802013-03-05 14:39:52 +0000754 /*
755 * x86 is special, but in a nice way. It uses a trampoline which
756 * enables the dcache if possible.
757 *
758 * For now, other archs use relocate_code(), which is implemented
759 * similarly for all archs. When we do generic relocation, hopefully
760 * we can make all archs enable the dcache prior to relocation.
761 */
762#ifdef CONFIG_X86
763 /*
764 * SDRAM and console are now initialised. The final stack can now
765 * be setup in SDRAM. Code execution will continue in Flash, but
766 * with the stack in SDRAM and Global Data in temporary memory
767 * (CPU cache)
768 */
769 board_init_f_r_trampoline(gd->start_addr_sp);
770#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000771 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000772#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000773
774 return 0;
775}
776#endif
777
778/* Record the board_init_f() bootstage (after arch_cpu_init()) */
779static int mark_bootstage(void)
780{
781 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
782
783 return 0;
784}
785
Simon Glassd59476b2014-07-10 22:23:28 -0600786static int initf_malloc(void)
787{
788#ifdef CONFIG_SYS_MALLOC_F_LEN
789 assert(gd->malloc_base); /* Set up by crt0.S */
790 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
791 gd->malloc_ptr = 0;
792#endif
793
794 return 0;
795}
796
Simon Glassab7cd622014-07-23 06:55:04 -0600797static int initf_dm(void)
798{
799#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
800 int ret;
801
802 ret = dm_init_and_scan(true);
803 if (ret)
804 return ret;
805#endif
806
807 return 0;
808}
809
Simon Glass1938f4a2013-03-11 06:49:53 +0000810static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000811#ifdef CONFIG_SANDBOX
812 setup_ram_buf,
813#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000814 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700815 setup_fdt,
Kevin Hilmand2107182014-12-09 15:03:58 -0800816#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700817 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800818#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700819 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000820#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
821 /* TODO: can this go into arch_cpu_init()? */
822 probecpu,
823#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000824 arch_cpu_init, /* basic arch cpu dependent setup */
825 mark_bootstage,
826#ifdef CONFIG_OF_CONTROL
827 fdtdec_check_fdt,
828#endif
Simon Glass3ea09532014-09-03 17:36:59 -0600829 initf_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000830#if defined(CONFIG_BOARD_EARLY_INIT_F)
831 board_early_init_f,
832#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000833 /* TODO: can any of this go into arch_cpu_init()? */
834#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
835 get_clocks, /* get CPU and bus clocks (etc.) */
836#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
837 && !defined(CONFIG_TQM885D)
838 adjust_sdram_tbs_8xx,
839#endif
840 /* TODO: can we rename this to timer_init()? */
841 init_timebase,
842#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800843#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000844 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000845#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000846#ifdef CONFIG_SYS_ALLOC_DPRAM
847#if !defined(CONFIG_CPM2)
848 dpram_init,
849#endif
850#endif
851#if defined(CONFIG_BOARD_POSTCLK_INIT)
852 board_postclk_init,
853#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000854#ifdef CONFIG_FSL_ESDHC
855 get_clocks,
856#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000857 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000858#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
859 /* get CPU and bus clocks according to the environment variable */
860 get_clocks_866,
861 /* adjust sdram refresh rate according to the new clock */
862 sdram_adjust_866,
863 init_timebase,
864#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000865 init_baud_rate, /* initialze baudrate settings */
866 serial_init, /* serial communications setup */
867 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000868#ifdef CONFIG_SANDBOX
869 sandbox_early_getopt_check,
870#endif
871#ifdef CONFIG_OF_CONTROL
872 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000873#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000874 display_options, /* say that we are here */
875 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900876#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000877 prt_8260_rsr,
878 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900879#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000880#if defined(CONFIG_MPC83xx)
881 prt_83xx_rsr,
882#endif
883#ifdef CONFIG_PPC
884 checkcpu,
885#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000886 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000887#if defined(CONFIG_MPC5xxx)
888 prt_mpc5xxx_clks,
889#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000890#if defined(CONFIG_DISPLAY_BOARDINFO)
891 checkboard, /* display board info */
892#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000893 INIT_FUNC_WATCHDOG_INIT
894#if defined(CONFIG_MISC_INIT_F)
895 misc_init_f,
896#endif
897 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100898#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000899 init_func_i2c,
900#endif
901#if defined(CONFIG_HARD_SPI)
902 init_func_spi,
903#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000904 announce_dram_init,
905 /* TODO: unify all these dram functions? */
Simon Glass07387d12014-11-06 13:20:05 -0700906#if defined(CONFIG_ARM) || defined(CONFIG_X86)
Simon Glass1938f4a2013-03-11 06:49:53 +0000907 dram_init, /* configure available RAM banks */
908#endif
Paul Burton3da7e5a2014-04-07 10:11:20 +0100909#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000910 init_func_ram,
911#endif
912#ifdef CONFIG_POST
913 post_init_f,
914#endif
915 INIT_FUNC_WATCHDOG_RESET
916#if defined(CONFIG_SYS_DRAM_TEST)
917 testdram,
918#endif /* CONFIG_SYS_DRAM_TEST */
919 INIT_FUNC_WATCHDOG_RESET
920
Simon Glass1938f4a2013-03-11 06:49:53 +0000921#ifdef CONFIG_POST
922 init_post,
923#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000924 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000925 /*
926 * Now that we have DRAM mapped and working, we can
927 * relocate the code and continue running from DRAM.
928 *
929 * Reserve memory at end of RAM for (top down in that order):
930 * - area that won't get touched by U-Boot and Linux (optional)
931 * - kernel log buffer
932 * - protected RAM
933 * - LCD framebuffer
934 * - monitor code
935 * - board info struct
936 */
937 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800938#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800939 /* Blackfin u-boot monitor should be on top of the ram */
940 reserve_uboot,
941#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000942#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
943 reserve_logbuffer,
944#endif
945#ifdef CONFIG_PRAM
946 reserve_pram,
947#endif
948 reserve_round_4k,
949#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
950 defined(CONFIG_ARM)
951 reserve_mmu,
952#endif
953#ifdef CONFIG_LCD
954 reserve_lcd,
955#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700956 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000957 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800958#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
959 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
960 !defined(CONFIG_BLACKFIN)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000961 reserve_video,
962#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800963#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000964 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800965#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000966#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000967 reserve_malloc,
968 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000969#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000970 setup_machine,
971 reserve_global_data,
972 reserve_fdt,
973 reserve_stacks,
974 setup_dram_config,
975 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000976#ifdef CONFIG_PPC
977 setup_board_part1,
978 INIT_FUNC_WATCHDOG_RESET
979 setup_board_part2,
980#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000981 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000982#ifdef CONFIG_SYS_EXTBDINFO
983 setup_board_extra,
984#endif
985 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000986 reloc_fdt,
987 setup_reloc,
Simon Glass808434c2013-11-10 10:26:59 -0700988#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000989 jump_to_copy,
990#endif
991 NULL,
992};
993
994void board_init_f(ulong boot_flags)
995{
York Sun2a1680e2014-05-02 17:28:04 -0700996#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
997 /*
998 * For some archtectures, global data is initialized and used before
999 * calling this function. The data should be preserved. For others,
1000 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1001 * here to host global data until relocation.
1002 */
Simon Glass1938f4a2013-03-11 06:49:53 +00001003 gd_t data;
1004
1005 gd = &data;
1006
David Fengcce6be72013-12-14 11:47:36 +08001007 /*
1008 * Clear global data before it is accessed at debug print
1009 * in initcall_run_list. Otherwise the debug print probably
1010 * get the wrong vaule of gd->have_console.
1011 */
David Fengcce6be72013-12-14 11:47:36 +08001012 zero_global_data();
1013#endif
1014
Simon Glass1938f4a2013-03-11 06:49:53 +00001015 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +04001016 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +00001017
1018 if (initcall_run_list(init_sequence_f))
1019 hang();
1020
Simon Glass808434c2013-11-10 10:26:59 -07001021#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +00001022 /* NOTREACHED - jump_to_copy() does not return */
1023 hang();
1024#endif
1025}
1026
Simon Glass48a33802013-03-05 14:39:52 +00001027#ifdef CONFIG_X86
1028/*
1029 * For now this code is only used on x86.
1030 *
1031 * init_sequence_f_r is the list of init functions which are run when
1032 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1033 * The following limitations must be considered when implementing an
1034 * '_f_r' function:
1035 * - 'static' variables are read-only
1036 * - Global Data (gd->xxx) is read/write
1037 *
1038 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1039 * supported). It _should_, if possible, copy global data to RAM and
1040 * initialise the CPU caches (to speed up the relocation process)
1041 *
1042 * NOTE: At present only x86 uses this route, but it is intended that
1043 * all archs will move to this when generic relocation is implemented.
1044 */
1045static init_fnc_t init_sequence_f_r[] = {
1046 init_cache_f_r,
1047 copy_uboot_to_ram,
1048 clear_bss,
1049 do_elf_reloc_fixups,
1050
1051 NULL,
1052};
1053
1054void board_init_f_r(void)
1055{
1056 if (initcall_run_list(init_sequence_f_r))
1057 hang();
1058
1059 /*
1060 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1061 * Transfer execution from Flash to RAM by calculating the address
1062 * of the in-RAM copy of board_init_r() and calling it
1063 */
1064 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1065
1066 /* NOTREACHED - board_init_r() does not return */
1067 hang();
1068}
1069#endif /* CONFIG_X86 */