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wdenk6f213472003-08-29 22:00:43 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
wdenk198ea9e2004-02-12 15:11:57 +00005 * (C) Copyright 2001-2004
wdenk6f213472003-08-29 22:00:43 +00006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2003
9 * Texas Instruments, <www.ti.com>
10 * Kshitij Gupta <Kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenkcd37d9e2004-02-10 00:03:41 +000022 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk6f213472003-08-29 22:00:43 +000023 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <linux/byteorder/swab.h>
33
34#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
wdenkcd37d9e2004-02-10 00:03:41 +000035flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenk6f213472003-08-29 22:00:43 +000036
37/* Board support for 1 or 2 flash devices */
38#undef FLASH_PORT_WIDTH32
39#define FLASH_PORT_WIDTH16
40
41#ifdef FLASH_PORT_WIDTH16
42#define FLASH_PORT_WIDTH ushort
43#define FLASH_PORT_WIDTHV vu_short
44#define SWAP(x) __swab16(x)
45#else
46#define FLASH_PORT_WIDTH ulong
47#define FLASH_PORT_WIDTHV vu_long
48#define SWAP(x) __swab32(x)
49#endif
50
51#define FPW FLASH_PORT_WIDTH
52#define FPWV FLASH_PORT_WIDTHV
53
54#define mb() __asm__ __volatile__ ("" : : : "memory")
55
56
wdenk6f213472003-08-29 22:00:43 +000057/* Flash Organization Structure */
58typedef struct OrgDef {
59 unsigned int sector_number;
60 unsigned int sector_size;
61} OrgDef;
62
63
64/* Flash Organizations */
65OrgDef OrgIntel_28F256L18T[] = {
66 {4, 32 * 1024}, /* 4 * 32kBytes sectors */
67 {255, 128 * 1024}, /* 255 * 128kBytes sectors */
68};
69
70
71/*-----------------------------------------------------------------------
72 * Functions
73 */
74unsigned long flash_init (void);
75static ulong flash_get_size (FPW * addr, flash_info_t * info);
76static int write_data (flash_info_t * info, ulong dest, FPW data);
77static void flash_get_offsets (ulong base, flash_info_t * info);
78void inline spin_wheel (void);
79void flash_print_info (flash_info_t * info);
80void flash_unprotect_sectors (FPWV * addr);
81int flash_erase (flash_info_t * info, int s_first, int s_last);
82int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
wdenk198ea9e2004-02-12 15:11:57 +000083void flash_unlock(flash_info_t * info);
wdenk6f213472003-08-29 22:00:43 +000084
85/*-----------------------------------------------------------------------
86 */
87
88unsigned long flash_init (void)
89{
90 int i;
91 ulong size = 0;
92 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
93 switch (i) {
94 case 0:
95 flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
96 flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
wdenkb98fff12004-02-09 20:51:26 +000097 /* to reset the lock bit */
98 flash_unlock(&flash_info[i]);
wdenk6f213472003-08-29 22:00:43 +000099 break;
100 default:
wdenk5f535fe2003-09-18 09:21:33 +0000101 panic ("configured too many flash banks!\n");
wdenk6f213472003-08-29 22:00:43 +0000102 break;
103 }
104 size += flash_info[i].size;
105 }
106
107 /* Protect monitor and environment sectors
108 */
109 flash_protect (FLAG_PROTECT_SET,
110 CFG_FLASH_BASE,
111 CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
112
113 flash_protect (FLAG_PROTECT_SET,
114 CFG_ENV_ADDR,
115 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
116
117 return size;
118}
119
120/*-----------------------------------------------------------------------
121 */
wdenk198ea9e2004-02-12 15:11:57 +0000122void flash_unlock(flash_info_t * info)
wdenkb98fff12004-02-09 20:51:26 +0000123{
wdenkcd37d9e2004-02-10 00:03:41 +0000124 int j;
125 for (j=2;j<CFG_MAX_FLASH_SECT;j++){
126 FPWV *addr = (FPWV *) (info->start[j]);
127 flash_unprotect_sectors (addr);
128 *addr = (FPW) 0x00500050;/* clear status register */
129 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
130 }
wdenkb98fff12004-02-09 20:51:26 +0000131}
132
133/*-----------------------------------------------------------------------
134 */
wdenk6f213472003-08-29 22:00:43 +0000135static void flash_get_offsets (ulong base, flash_info_t * info)
136{
137 int i;
138 OrgDef *pOrgDef;
139
140 pOrgDef = OrgIntel_28F256L18T;
141 if (info->flash_id == FLASH_UNKNOWN) {
142 return;
143 }
144
145 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
146 for (i = 0; i < info->sector_count; i++) {
147 if (i > 255) {
148 info->start[i] = base + (i * 0x8000);
149 info->protect[i] = 0;
150 } else {
151 info->start[i] = base +
152 (i * PHYS_FLASH_SECT_SIZE);
153 info->protect[i] = 0;
154 }
155 }
156 }
157}
158
159/*-----------------------------------------------------------------------
160 */
161void flash_print_info (flash_info_t * info)
162{
163 int i;
164
165 if (info->flash_id == FLASH_UNKNOWN) {
166 printf ("missing or unknown FLASH type\n");
167 return;
168 }
169
170 switch (info->flash_id & FLASH_VENDMASK) {
171 case FLASH_MAN_INTEL:
172 printf ("INTEL ");
173 break;
174 default:
175 printf ("Unknown Vendor ");
176 break;
177 }
178
179 switch (info->flash_id & FLASH_TYPEMASK) {
180 case FLASH_28F256L18T:
181 printf ("FLASH 28F256L18T\n");
182 break;
183 default:
184 printf ("Unknown Chip Type\n");
185 break;
186 }
187
188 printf (" Size: %ld MB in %d Sectors\n",
189 info->size >> 20, info->sector_count);
190
191 printf (" Sector Start Addresses:");
192 for (i = 0; i < info->sector_count; ++i) {
193 if ((i % 5) == 0)
194 printf ("\n ");
195 printf (" %08lX%s",
wdenkcd37d9e2004-02-10 00:03:41 +0000196 info->start[i], info->protect[i] ? " (RO)" : " ");
wdenk6f213472003-08-29 22:00:43 +0000197 }
198 printf ("\n");
199 return;
200}
201
202/*
203 * The following code cannot be run from FLASH!
204 */
205static ulong flash_get_size (FPW * addr, flash_info_t * info)
206{
207 volatile FPW value;
208
209 /* Write auto select command: read Manufacturer ID */
210 addr[0x5555] = (FPW) 0x00AA00AA;
211 addr[0x2AAA] = (FPW) 0x00550055;
212 addr[0x5555] = (FPW) 0x00900090;
213
214 mb ();
215 value = addr[0];
216
217 switch (value) {
218
219 case (FPW) INTEL_MANUFACT:
220 info->flash_id = FLASH_MAN_INTEL;
221 break;
222
223 default:
224 info->flash_id = FLASH_UNKNOWN;
225 info->sector_count = 0;
226 info->size = 0;
227 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
wdenkcd37d9e2004-02-10 00:03:41 +0000228 return (0); /* no or unknown flash */
wdenk6f213472003-08-29 22:00:43 +0000229 }
230
231 mb ();
wdenkcd37d9e2004-02-10 00:03:41 +0000232 value = addr[1]; /* device ID */
wdenk6f213472003-08-29 22:00:43 +0000233 switch (value) {
234
235 case (FPW) (INTEL_ID_28F256L18T):
236 info->flash_id += FLASH_28F256L18T;
237 info->sector_count = 259;
238 info->size = 0x02000000;
wdenkcd37d9e2004-02-10 00:03:41 +0000239 break; /* => 32 MB */
wdenk6f213472003-08-29 22:00:43 +0000240
241 default:
242 info->flash_id = FLASH_UNKNOWN;
243 break;
244 }
245
246 if (info->sector_count > CFG_MAX_FLASH_SECT) {
247 printf ("** ERROR: sector count %d > max (%d) **\n",
248 info->sector_count, CFG_MAX_FLASH_SECT);
249 info->sector_count = CFG_MAX_FLASH_SECT;
250 }
251
252 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
253
254 return (info->size);
255}
256
257
wdenk6f213472003-08-29 22:00:43 +0000258/* unprotects a sector for write and erase
259 * on some intel parts, this unprotects the entire chip, but it
260 * wont hurt to call this additional times per sector...
261 */
262void flash_unprotect_sectors (FPWV * addr)
263{
264#define PD_FINTEL_WSMS_READY_MASK 0x0080
265
266 *addr = (FPW) 0x00500050; /* clear status register */
267
268 /* this sends the clear lock bit command */
269 *addr = (FPW) 0x00600060;
270 *addr = (FPW) 0x00D000D0;
271}
272
273
274/*-----------------------------------------------------------------------
275 */
276
277int flash_erase (flash_info_t * info, int s_first, int s_last)
278{
279 int flag, prot, sect;
280 ulong type, start, last;
281 int rcode = 0;
282
283 if ((s_first < 0) || (s_first > s_last)) {
284 if (info->flash_id == FLASH_UNKNOWN) {
285 printf ("- missing\n");
286 } else {
287 printf ("- no sectors to erase\n");
288 }
289 return 1;
290 }
291
292 type = (info->flash_id & FLASH_VENDMASK);
293 if ((type != FLASH_MAN_INTEL)) {
294 printf ("Can't erase unknown flash type %08lx - aborted\n",
295 info->flash_id);
296 return 1;
297 }
298
299 prot = 0;
300 for (sect = s_first; sect <= s_last; ++sect) {
301 if (info->protect[sect]) {
302 prot++;
303 }
304 }
305
306 if (prot) {
307 printf ("- Warning: %d protected sectors will not be erased!\n",
308 prot);
309 } else {
310 printf ("\n");
311 }
312
313
wdenk6f213472003-08-29 22:00:43 +0000314 start = get_timer (0);
315 last = start;
316
317 /* Disable interrupts which might cause a timeout here */
318 flag = disable_interrupts ();
319
320 /* Start erase on unprotected sectors */
321 for (sect = s_first; sect <= s_last; sect++) {
wdenkcd37d9e2004-02-10 00:03:41 +0000322 if (info->protect[sect] == 0) { /* not protected */
wdenk6f213472003-08-29 22:00:43 +0000323 FPWV *addr = (FPWV *) (info->start[sect]);
324 FPW status;
325
326 printf ("Erasing sector %2d ... ", sect);
327
328 flash_unprotect_sectors (addr);
329
330 /* arm simple, non interrupt dependent timer */
331 reset_timer_masked ();
332
333 *addr = (FPW) 0x00500050;/* clear status register */
334 *addr = (FPW) 0x00200020;/* erase setup */
335 *addr = (FPW) 0x00D000D0;/* erase confirm */
336
337 while (((status =
338 *addr) & (FPW) 0x00800080) !=
339 (FPW) 0x00800080) {
wdenk42d1f032003-10-15 23:53:47 +0000340 if (get_timer_masked () >
wdenk6f213472003-08-29 22:00:43 +0000341 CFG_FLASH_ERASE_TOUT) {
342 printf ("Timeout\n");
343 /* suspend erase */
344 *addr = (FPW) 0x00B000B0;
345 /* reset to read mode */
346 *addr = (FPW) 0x00FF00FF;
347 rcode = 1;
348 break;
349 }
350 }
351
wdenkcd37d9e2004-02-10 00:03:41 +0000352 /* clear status register cmd. */
wdenk6f213472003-08-29 22:00:43 +0000353 *addr = (FPW) 0x00500050;
354 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
355 printf (" done\n");
356 }
357 }
358 return rcode;
359}
360
361/*-----------------------------------------------------------------------
362 * Copy memory to flash, returns:
363 * 0 - OK
364 * 1 - write timeout
365 * 2 - Flash not erased
366 * 4 - Flash not identified
367 */
368
369int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
370{
371 ulong cp, wp;
372 FPW data;
373 int count, i, l, rc, port_width;
374
375 if (info->flash_id == FLASH_UNKNOWN) {
376 return 4;
377 }
378/* get lower word aligned address */
379#ifdef FLASH_PORT_WIDTH16
380 wp = (addr & ~1);
381 port_width = 2;
382#else
383 wp = (addr & ~3);
384 port_width = 4;
385#endif
386
387 /*
388 * handle unaligned start bytes
389 */
390 if ((l = addr - wp) != 0) {
391 data = 0;
392 for (i = 0, cp = wp; i < l; ++i, ++cp) {
393 data = (data << 8) | (*(uchar *) cp);
394 }
395 for (; i < port_width && cnt > 0; ++i) {
396 data = (data << 8) | *src++;
397 --cnt;
398 ++cp;
399 }
400 for (; cnt == 0 && i < port_width; ++i, ++cp) {
401 data = (data << 8) | (*(uchar *) cp);
402 }
403
404 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
405 return (rc);
406 }
407 wp += port_width;
408 }
409
410 /*
411 * handle word aligned part
412 */
413 count = 0;
414 while (cnt >= port_width) {
415 data = 0;
416 for (i = 0; i < port_width; ++i) {
417 data = (data << 8) | *src++;
418 }
419 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
420 return (rc);
421 }
422 wp += port_width;
423 cnt -= port_width;
424 if (count++ > 0x800) {
425 spin_wheel ();
426 count = 0;
427 }
428 }
429
430 if (cnt == 0) {
431 return (0);
432 }
433
434 /*
435 * handle unaligned tail bytes
436 */
437 data = 0;
438 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
439 data = (data << 8) | *src++;
440 --cnt;
441 }
442 for (; i < port_width; ++i, ++cp) {
443 data = (data << 8) | (*(uchar *) cp);
444 }
445
446 return (write_data (info, wp, SWAP (data)));
447}
448
449/*-----------------------------------------------------------------------
450 * Write a word or halfword to Flash, returns:
451 * 0 - OK
452 * 1 - write timeout
453 * 2 - Flash not erased
454 */
455static int write_data (flash_info_t * info, ulong dest, FPW data)
456{
457 FPWV *addr = (FPWV *) dest;
458 ulong status;
459 int flag;
460
461 /* Check if Flash is (sufficiently) erased */
462 if ((*addr & data) != data) {
463 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
464 return (2);
465 }
wdenk6f213472003-08-29 22:00:43 +0000466 /* Disable interrupts which might cause a timeout here */
467 flag = disable_interrupts ();
468 *addr = (FPW) 0x00400040; /* write setup */
469 *addr = data;
470
471 /* arm simple, non interrupt dependent timer */
472 reset_timer_masked ();
473
474 /* wait while polling the status register */
475 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
476 if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
477 *addr = (FPW) 0x00FF00FF; /* restore read mode */
478 return (1);
479 }
480 }
481 *addr = (FPW) 0x00FF00FF; /* restore read mode */
482 return (0);
483}
484
485void inline spin_wheel (void)
486{
487 static int p = 0;
488 static char w[] = "\\/-";
489
490 printf ("\010%c", w[p]);
491 (++p == 3) ? (p = 0) : 0;
492}