Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Qualcomm Camera Clock & Reset Controller on SM8450 |
| 8 | |
| 9 | maintainers: |
| 10 | - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 11 | - Jagadeesh Kona <quic_jkona@quicinc.com> |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 12 | |
| 13 | description: | |
| 14 | Qualcomm camera clock control module provides the clocks, resets and power |
| 15 | domains on SM8450. |
| 16 | |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 17 | See also: |
| 18 | include/dt-bindings/clock/qcom,sc8280xp-camcc.h |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 19 | include/dt-bindings/clock/qcom,sm8450-camcc.h |
| 20 | include/dt-bindings/clock/qcom,sm8550-camcc.h |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 21 | include/dt-bindings/clock/qcom,sm8650-camcc.h |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 22 | include/dt-bindings/clock/qcom,x1e80100-camcc.h |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 23 | |
| 24 | allOf: |
| 25 | - $ref: qcom,gcc.yaml# |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 26 | |
| 27 | properties: |
| 28 | compatible: |
| 29 | enum: |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 30 | - qcom,sc8280xp-camcc |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 31 | - qcom,sm8450-camcc |
| 32 | - qcom,sm8550-camcc |
Tom Rini | 6b642ac | 2024-10-01 12:20:28 -0600 | [diff] [blame] | 33 | - qcom,sm8650-camcc |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 34 | - qcom,x1e80100-camcc |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 35 | |
| 36 | clocks: |
| 37 | items: |
| 38 | - description: Camera AHB clock from GCC |
| 39 | - description: Board XO source |
| 40 | - description: Board active XO source |
| 41 | - description: Sleep clock source |
| 42 | |
| 43 | power-domains: |
| 44 | maxItems: 1 |
| 45 | description: |
| 46 | A phandle and PM domain specifier for the MMCX power domain. |
| 47 | |
| 48 | required-opps: |
| 49 | maxItems: 1 |
| 50 | description: |
| 51 | A phandle to an OPP node describing required MMCX performance point. |
| 52 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 53 | reg: |
| 54 | maxItems: 1 |
| 55 | |
| 56 | required: |
| 57 | - compatible |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 58 | - clocks |
| 59 | - power-domains |
| 60 | - required-opps |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 61 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 62 | unevaluatedProperties: false |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 63 | |
| 64 | examples: |
| 65 | - | |
| 66 | #include <dt-bindings/clock/qcom,gcc-sm8450.h> |
| 67 | #include <dt-bindings/clock/qcom,rpmh.h> |
| 68 | #include <dt-bindings/power/qcom,rpmhpd.h> |
| 69 | clock-controller@ade0000 { |
| 70 | compatible = "qcom,sm8450-camcc"; |
| 71 | reg = <0xade0000 0x20000>; |
| 72 | clocks = <&gcc GCC_CAMERA_AHB_CLK>, |
| 73 | <&rpmhcc RPMH_CXO_CLK>, |
| 74 | <&rpmhcc RPMH_CXO_CLK_A>, |
| 75 | <&sleep_clk>; |
| 76 | power-domains = <&rpmhpd RPMHPD_MMCX>; |
| 77 | required-opps = <&rpmhpd_opp_low_svs>; |
| 78 | #clock-cells = <1>; |
| 79 | #reset-cells = <1>; |
| 80 | #power-domain-cells = <1>; |
| 81 | }; |
| 82 | ... |