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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm TCSR Clock Controller on SM8550
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11
12description: |
13 Qualcomm TCSR clock control module provides the clocks, resets and
14 power domains on SM8550
15
Tom Rini93743d22024-04-01 09:08:13 -040016 See also:
17 - include/dt-bindings/clock/qcom,sm8550-tcsr.h
18 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
Tom Rini53633a82024-02-29 12:33:36 -050019
20properties:
21 compatible:
22 items:
Tom Rini93743d22024-04-01 09:08:13 -040023 - enum:
24 - qcom,sm8550-tcsr
25 - qcom,sm8650-tcsr
Tom Rini6bb92fc2024-05-20 09:54:58 -060026 - qcom,x1e80100-tcsr
Tom Rini53633a82024-02-29 12:33:36 -050027 - const: syscon
28
29 clocks:
30 items:
31 - description: TCXO pad clock
32
33 reg:
34 maxItems: 1
35
36 '#clock-cells':
37 const: 1
38
39 '#reset-cells':
40 const: 1
41
42required:
43 - compatible
44 - clocks
45
46additionalProperties: false
47
48examples:
49 - |
50 #include <dt-bindings/clock/qcom,rpmh.h>
51
52 clock-controller@1fc0000 {
53 compatible = "qcom,sm8550-tcsr", "syscon";
54 reg = <0x1fc0000 0x30000>;
55 clocks = <&rpmhcc RPMH_CXO_CLK>;
56 #clock-cells = <1>;
57 #reset-cells = <1>;
58 };
59
60...