blob: e25fa72fd7857767bbecc21977a5ef02c9ce3437 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i3c/i3c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: I3C bus
8
9maintainers:
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
12
13description: |
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
16 may, during the life of the bus, request mastership.
17
18properties:
19 $nodename:
Tom Rini6bb92fc2024-05-20 09:54:58 -060020 pattern: "^i3c@[0-9a-f]+$"
Tom Rini53633a82024-02-29 12:33:36 -050021
22 "#address-cells":
23 const: 3
24 description: |
25 Each I2C device connected to the bus should be described in a subnode.
26
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
28 and are thus discoverable. So, by default, I3C devices do not have to be
29 described in the device tree. This being said, one might want to attach
30 extra resources to these devices, and those resources may have to be
31 described in the device tree, which in turn means we have to describe
32 I3C devices.
33
34 Another use case for describing an I3C device in the device tree is when
35 this I3C device has a static I2C address and we want to assign it a
36 specific I3C dynamic address before the DAA takes place (so that other
37 devices on the bus can't take this dynamic address).
38
39 "#size-cells":
40 const: 0
41
42 i3c-scl-hz:
43 description: |
44 Frequency of the SCL signal used for I3C transfers. When undefined, the
45 default value should be 12.5MHz.
46
47 May not be supported by all controllers.
48
49 i2c-scl-hz:
50 description: |
51 Frequency of the SCL signal used for I2C transfers. When undefined, the
52 default should be to look at LVR (Legacy Virtual Register) values of
53 I2C devices described in the device tree to determine the maximum I2C
54 frequency.
55
56 May not be supported by all controllers.
57
58 mctp-controller:
59 type: boolean
60 description: |
61 Indicates that the system is accessible via this bus as an endpoint for
62 MCTP over I3C transport.
63
64required:
65 - "#address-cells"
66 - "#size-cells"
67
68patternProperties:
69 "@[0-9a-f]+$":
70 type: object
71 description: |
72 I2C child, should be named: <device-type>@<i2c-address>
73
Tom Rini6bb92fc2024-05-20 09:54:58 -060074 All properties described in dtschema schemas/i2c/i2c-controller.yaml
Tom Rini53633a82024-02-29 12:33:36 -050075 are valid here, except the reg property whose content is changed.
76
77 properties:
78 compatible:
79 description:
80 Compatible of the I2C device.
81
82 reg:
83 items:
84 - items:
85 - description: |
86 I2C address. 10 bit addressing is not supported. Devices with
87 10-bit address can't be properly passed through DEFSLVS
88 command.
89 minimum: 0
90 maximum: 0x7f
91 - const: 0
92 - description: |
93 Shall encode the I3C LVR (Legacy Virtual Register):
Tom Rini6b642ac2024-10-01 12:20:28 -060094 See include/dt-bindings/i3c/i3c.h
Tom Rini53633a82024-02-29 12:33:36 -050095 bit[31:8]: unused/ignored
96 bit[7:5]: I2C device index. Possible values:
97 * 0: I2C device has a 50 ns spike filter
98 * 1: I2C device does not have a 50 ns spike filter but
99 supports high frequency on SCL
100 * 2: I2C device does not have a 50 ns spike filter and is
101 not tolerant to high frequencies
102 * 3-7: reserved
103 bit[4]: tell whether the device operates in FM (Fast Mode)
104 or FM+ mode:
105 * 0: FM+ mode
106 * 1: FM mode
107 bit[3:0]: device type
108 * 0-15: reserved
109
110 required:
111 - compatible
112 - reg
113
114 "@[0-9a-f]+,[0-9a-f]+$":
115 type: object
116 description: |
117 I3C child, should be named: <device-type>@<static-i2c-address>,<i3c-pid>
118
119 properties:
120 reg:
121 items:
122 - items:
123 - description: |
124 Encodes the static I2C address. Should be 0 if the device does
125 not have one (0 is not a valid I2C address).
126 minimum: 0
127 maximum: 0x7f
128 - description: |
129 First half of the Provisioned ID (following the PID
130 definition provided by the I3C specification).
131
132 Contains the manufacturer ID left-shifted by 1.
133 - description: |
134 Second half of the Provisioned ID (following the PID
135 definition provided by the I3C specification).
136
137 Contains the ORing of the part ID left-shifted by 16,
138 the instance ID left-shifted by 12 and extra information.
139
140 assigned-address:
141 $ref: /schemas/types.yaml#/definitions/uint32
142 minimum: 0x1
143 maximum: 0xff
144 description: |
145 Dynamic address to be assigned to this device. In case static address is
146 present (first cell of the reg property != 0), this address is assigned
147 through SETDASA. If static address is not present, this address is assigned
148 through SETNEWDA after assigning a temporary address via ENTDAA.
149
150 required:
151 - reg
152
153additionalProperties: true
154
155examples:
156 - |
Tom Rini6b642ac2024-10-01 12:20:28 -0600157 #include <dt-bindings/i3c/i3c.h>
158
Tom Rini6bb92fc2024-05-20 09:54:58 -0600159 i3c@d040000 {
Tom Rini53633a82024-02-29 12:33:36 -0500160 compatible = "cdns,i3c-master";
161 clocks = <&coreclock>, <&i3csysclock>;
162 clock-names = "pclk", "sysclk";
163 interrupts = <3 0>;
164 reg = <0x0d040000 0x1000>;
165 #address-cells = <3>;
166 #size-cells = <0>;
167 i2c-scl-hz = <100000>;
168
169 /* I2C device. */
170 eeprom@57 {
171 compatible = "atmel,24c01";
Tom Rini6b642ac2024-10-01 12:20:28 -0600172 reg = <0x57 0x0 (I2C_FM | I2C_FILTER)>;
Tom Rini53633a82024-02-29 12:33:36 -0500173 pagesize = <0x8>;
174 };
175
176 /* I3C device with a static I2C address and assigned address. */
177 thermal_sensor: sensor@68,39200144004 {
178 reg = <0x68 0x392 0x144004>;
179 assigned-address = <0xa>;
180 };
181
182 /* I3C device with only assigned address. */
183 pressure_sensor: sensor@0,39200124004 {
184 reg = <0x0 0x392 0x124000>;
185 assigned-address = <0xc>;
186 };
187
188 /*
189 * I3C device without a static I2C address but requiring
190 * resources described in the DT.
191 */
192 sensor@0,39200154004 {
193 reg = <0x0 0x392 0x154004>;
194 clocks = <&clock_provider 0>;
195 };
196 };