blob: c43e86a8c2e0d3d4557a39f5201da0fd167a640d [file] [log] [blame]
Tom Rini762f85b2024-07-20 11:15:10 -06001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX8MP HDMI PHY
8
9maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11
12properties:
13 compatible:
14 enum:
15 - fsl,imx8mp-hdmi-phy
16
17 reg:
18 maxItems: 1
19
20 "#clock-cells":
21 const: 0
22
23 clocks:
24 maxItems: 2
25
26 clock-names:
27 items:
28 - const: apb
29 - const: ref
30
31 "#phy-cells":
32 const: 0
33
34 power-domains:
35 maxItems: 1
36
37required:
38 - compatible
39 - reg
40 - "#clock-cells"
41 - clocks
42 - clock-names
43 - "#phy-cells"
44 - power-domains
45
46additionalProperties: false
47
48examples:
49 - |
50 #include <dt-bindings/clock/imx8mp-clock.h>
51 #include <dt-bindings/power/imx8mp-power.h>
52
53 phy@32fdff00 {
54 compatible = "fsl,imx8mp-hdmi-phy";
55 reg = <0x32fdff00 0x100>;
56 clocks = <&clk IMX8MP_CLK_HDMI_APB>,
57 <&clk IMX8MP_CLK_HDMI_24M>;
58 clock-names = "apb", "ref";
59 power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>;
60 #clock-cells = <0>;
61 #phy-cells = <0>;
62 };