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Sergei Poselenov9531a232010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenov9531a232010-09-09 23:03:31 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090019#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Sergei Poselenov9531a232010-09-09 23:03:31 +020020#define CONFIG_A4M072 1 /* ... on A4M072 board */
21#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
22
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +020023#define CONFIG_SYS_TEXT_BASE 0xFE000000
24
Sergei Poselenov9531a232010-09-09 23:03:31 +020025#define CONFIG_MISC_INIT_R
26
27#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
28
Sergei Poselenov9531a232010-09-09 23:03:31 +020029#define CONFIG_HIGH_BATS 1 /* High BATs supported */
30
31/*
32 * Serial console configuration
33 */
34#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
35#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
36#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
37/* define to enable silent console */
38#define CONFIG_SILENT_CONSOLE
39#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
40
41/*
42 * PCI Mapping:
43 * 0x40000000 - 0x4fffffff - PCI Memory
44 * 0x50000000 - 0x50ffffff - PCI IO Space
45 */
46#define CONFIG_PCI
47
48#if defined(CONFIG_PCI)
49#define CONFIG_PCI_PNP 1
50#define CONFIG_PCI_SCAN_SHOW 1
51#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
52
53#define CONFIG_PCI_MEM_BUS 0x40000000
54#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
55#define CONFIG_PCI_MEM_SIZE 0x10000000
56
57#define CONFIG_PCI_IO_BUS 0x50000000
58#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
59#define CONFIG_PCI_IO_SIZE 0x01000000
60#endif
61
62#define CONFIG_SYS_XLB_PIPELINING 1
63
Wolfgang Denk071bc922010-10-27 22:48:30 +020064#undef CONFIG_EEPRO100
Sergei Poselenov9531a232010-09-09 23:03:31 +020065
66/* Partitions */
67#define CONFIG_MAC_PARTITION
68#define CONFIG_DOS_PARTITION
69
70/* USB */
71#define CONFIG_USB_OHCI_NEW
72#define CONFIG_USB_STORAGE
73#define CONFIG_SYS_OHCI_BE_CONTROLLER
74#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
75#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
76#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
77#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
78#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
79
80#define CONFIG_TIMESTAMP /* Print image info with timestamp */
81
82/*
83 * BOOTP options
84 */
85#define CONFIG_BOOTP_BOOTFILESIZE
86#define CONFIG_BOOTP_BOOTPATH
87#define CONFIG_BOOTP_GATEWAY
88#define CONFIG_BOOTP_HOSTNAME
89
90
91/*
92 * Command line configuration.
93 */
94#include <config_cmd_default.h>
95
96#define CONFIG_CMD_EEPROM
97#define CONFIG_CMD_FAT
98#define CONFIG_CMD_I2C
99#define CONFIG_CMD_IDE
100#define CONFIG_CMD_NFS
101#define CONFIG_CMD_SNTP
102#define CONFIG_CMD_USB
103#define CONFIG_CMD_MII
104#define CONFIG_CMD_DHCP
105#define CONFIG_CMD_PING
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200106#define CONFIG_CMD_DISPLAY
Sergei Poselenov9531a232010-09-09 23:03:31 +0200107
108#if defined(CONFIG_PCI)
109#define CONFIG_CMD_PCI
110#endif
111
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200112#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200113#define CONFIG_SYS_LOWBOOT 1
114#define CONFIG_SYS_LOWBOOT32 1
115#endif
116
117/*
118 * Autobooting
119 */
120#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
121
122#define CONFIG_SYS_AUTOLOAD "n"
123
124#define CONFIG_AUTOBOOT_KEYED
125#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
126#define CONFIG_AUTOBOOT_DELAY_STR "asdfg"
127
128#undef CONFIG_BOOTARGS
129#define CONFIG_PREBOOT "run try_update"
130
131#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200132 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
133 "cf1=diskboot 200000 0:1\0" \
134 "bootcmd_cf1=run bcf1\0" \
135 "bcf=setenv bootargs root=/dev/hda3\0" \
136 "bootcmd_nfs=run bnfs\0" \
137 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
138 "panic=1\0" \
139 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
140 "run norargs addip; run bk\0" \
141 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
142 "run nfsargs addip ; run bk\0" \
143 "nfsargs=setenv bootargs root=/dev/nfs rw " \
144 "nfsroot=${serverip}:${rootpath}\0" \
145 "try_update=usb start;sleep 2;usb start;sleep 1;" \
146 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
147 "source 2F0000\0" \
148 "env_addr=FE060000\0" \
149 "kernel_addr=FE100000\0" \
150 "rootfs_addr=FE200000\0" \
151 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
152 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
153 "bcf1=run cf1; run bcf; run addip; run bk\0" \
154 "add_consolespec=setenv bootargs ${bootargs} " \
155 "console=/dev/null quiet\0" \
156 "addip=if test -n ${ethaddr};" \
157 "then if test -n ${ipaddr};" \
158 "then setenv bootargs ${bootargs} " \
159 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
160 "${netmask}:${hostname}:${netdev}:off;" \
161 "fi;" \
162 "else;" \
163 "setenv bootargs ${bootargs} no_ethaddr;" \
164 "fi\0" \
165 "hostname=CPUP0\0" \
166 "ethaddr=00:00:00:00:00:00\0" \
167 "netdev=eth0\0" \
168 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9531a232010-09-09 23:03:31 +0200169 ""
170/*
171 * IPB Bus clocking configuration.
172 */
173#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
174
175/*
176 * I2C configuration
177 */
178#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
179#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
180
181#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
182#define CONFIG_SYS_I2C_SLAVE 0x7F
183
184/*
185 * EEPROM configuration
186 */
187#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
188#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
189#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
190#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
191#define CONFIG_SYS_EEPROM_WREN 1
192#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
193
194/*
195 * Flash configuration
196 */
197#define CONFIG_SYS_FLASH_BASE 0xFE000000
198#define CONFIG_SYS_FLASH_SIZE 0x02000000
199#if !defined(CONFIG_SYS_LOWBOOT)
200#error "CONFIG_SYS_LOWBOOT not defined?"
201#else /* CONFIG_SYS_LOWBOOT */
202#if defined(CONFIG_SYS_LOWBOOT32)
203#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
204#endif
205#endif /* CONFIG_SYS_LOWBOOT */
206
207#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
208#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
209#define CONFIG_FLASH_CFI_DRIVER
210#define CONFIG_SYS_FLASH_CFI
211#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
212#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanoke36aff62010-10-21 17:20:13 +0200213#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9531a232010-09-09 23:03:31 +0200214
215/*
216 * Environment settings
217 */
218#define CONFIG_ENV_IS_IN_FLASH 1
219#define CONFIG_ENV_SIZE 0x10000
220#define CONFIG_ENV_SECT_SIZE 0x20000
221#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
222#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
223
224#define CONFIG_ENV_OVERWRITE 1
225
226/*
227 * Memory map
228 */
229#define CONFIG_SYS_MBAR 0xF0000000
230#define CONFIG_SYS_SDRAM_BASE 0x00000000
231#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
232
233/* Use SRAM until RAM will be available */
234#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200235#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200236
237
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200238#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9531a232010-09-09 23:03:31 +0200239#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
240
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200241#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200242#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
243# define CONFIG_SYS_RAMBOOT 1
244#endif
245
246#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
247#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
248#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
249
250/*
251 * Ethernet configuration
252 */
253#define CONFIG_MPC5xxx_FEC 1
254#define CONFIG_MPC5xxx_FEC_MII100
255/*
256 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
257 */
258/* #define CONFIG_MPC5xxx_FEC_MII10 */
259#define CONFIG_PHY_ADDR 0x1f
260#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
261
262/*
263 * GPIO configuration
264 */
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200265#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9531a232010-09-09 23:03:31 +0200266
267/*
268 * Miscellaneous configurable options
269 */
270#define CONFIG_SYS_HUSH_PARSER
271#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9531a232010-09-09 23:03:31 +0200272#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200273#if defined(CONFIG_CMD_KGDB)
274#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
275#else
276#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
277#endif
278#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
279#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
280#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
281
282#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
283#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
284
285#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
286
Sergei Poselenov9531a232010-09-09 23:03:31 +0200287#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
288#if defined(CONFIG_CMD_KGDB)
289# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
290#endif
291
292
293/*
294 * Various low-level settings
295 */
296#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
297#define CONFIG_SYS_HID0_FINAL HID0_ICE
298/* Flash at CSBoot, CS0 */
299#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
300#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
301#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
302#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
303#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
304/* External SRAM at CS1 */
305#define CONFIG_SYS_CS1_START 0x62000000
306#define CONFIG_SYS_CS1_SIZE 0x00400000
307#define CONFIG_SYS_CS1_CFG 0x00009930
308#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
309#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200310/* LED display at CS7 */
311#define CONFIG_SYS_CS7_START 0x6a000000
312#define CONFIG_SYS_CS7_SIZE (64*1024)
313#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9531a232010-09-09 23:03:31 +0200314
315#define CONFIG_SYS_CS_BURST 0x00000000
316#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
317
318#define CONFIG_SYS_RESET_ADDRESS 0xff000000
319
320/*-----------------------------------------------------------------------
321 * USB stuff
322 *-----------------------------------------------------------------------
323 */
324#define CONFIG_USB_CLOCK 0x0001BBBB
325#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
326
327/*-----------------------------------------------------------------------
328 * IDE/ATA stuff Supports IDE harddisk
329 *-----------------------------------------------------------------------
330 */
331
332#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
333
334#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
335#undef CONFIG_IDE_LED /* LED for ide not supported */
336
337#define CONFIG_IDE_PREINIT
338
339#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
340#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
341
342#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
343
344#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
345
346/* Offset for data I/O */
347#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
348
349/* Offset for normal register accesses */
350#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
351
352/* Offset for alternate registers */
353#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
354
355/* Interval between registers */
356#define CONFIG_SYS_ATA_STRIDE 4
357
358#define CONFIG_ATAPI 1
359
360/*-----------------------------------------------------------------------
361 * Open firmware flat tree support
362 *-----------------------------------------------------------------------
363 */
364#define CONFIG_OF_LIBFDT 1
365#define CONFIG_OF_BOARD_SETUP 1
366
367#define OF_CPU "PowerPC,5200@0"
368#define OF_SOC "soc5200@f0000000"
369#define OF_TBCLK (bd->bi_busfreq / 4)
370#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
371
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200372/* Support for the 7-segment display */
373#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
374#define CONFIG_SHOW_ACTIVITY /* used for display realization */
375
Ilya Yanok92d1a402010-09-09 23:03:34 +0200376#define CONFIG_SHOW_BOOT_PROGRESS
377
Sergei Poselenov9531a232010-09-09 23:03:31 +0200378#endif /* __CONFIG_H */