wdenk | 138ff60 | 2004-12-16 15:52:40 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003-2004 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2004 |
| 6 | * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <common.h> |
| 28 | |
| 29 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
| 30 | |
| 31 | /* |
| 32 | * CPU to flash interface is 8-bit, so make declaration accordingly |
| 33 | */ |
| 34 | typedef unsigned char FLASH_PORT_WIDTH; |
| 35 | typedef volatile unsigned char FLASH_PORT_WIDTHV; |
| 36 | |
| 37 | #define FPW FLASH_PORT_WIDTH |
| 38 | #define FPWV FLASH_PORT_WIDTHV |
| 39 | |
| 40 | #define FLASH_CYCLE1 0x0555 |
| 41 | #define FLASH_CYCLE2 0x02aa |
| 42 | |
| 43 | /*----------------------------------------------------------------------- |
| 44 | * Functions |
| 45 | */ |
| 46 | static ulong flash_get_size(FPWV *addr, flash_info_t *info); |
| 47 | static void flash_reset(flash_info_t *info); |
| 48 | static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data); |
| 49 | static flash_info_t *flash_get_info(ulong base); |
| 50 | |
| 51 | /*----------------------------------------------------------------------- |
| 52 | * flash_init() |
| 53 | * |
| 54 | * sets up flash_info and returns size of FLASH (bytes) |
| 55 | */ |
| 56 | unsigned long flash_init (void) |
| 57 | { |
| 58 | unsigned long size = 0; |
| 59 | extern void flash_preinit(void); |
| 60 | ulong flashbase = CFG_FLASH_BASE; |
| 61 | |
| 62 | flash_preinit(); |
| 63 | |
| 64 | /* Init: no FLASHes known */ |
| 65 | memset(&flash_info[0], 0, sizeof(flash_info_t)); |
| 66 | |
| 67 | flash_info[0].size = |
| 68 | flash_get_size((FPW *)flashbase, &flash_info[0]); |
| 69 | |
| 70 | size = flash_info[0].size; |
| 71 | |
| 72 | #if CFG_MONITOR_BASE >= CFG_FLASH_BASE |
| 73 | /* monitor protection ON by default */ |
| 74 | flash_protect(FLAG_PROTECT_SET, |
| 75 | CFG_MONITOR_BASE, |
| 76 | CFG_MONITOR_BASE+monitor_flash_len-1, |
| 77 | flash_get_info(CFG_MONITOR_BASE)); |
| 78 | #endif |
| 79 | |
| 80 | #ifdef CFG_ENV_IS_IN_FLASH |
| 81 | /* ENV protection ON by default */ |
| 82 | flash_protect(FLAG_PROTECT_SET, |
| 83 | CFG_ENV_ADDR, |
| 84 | CFG_ENV_ADDR+CFG_ENV_SIZE-1, |
| 85 | flash_get_info(CFG_ENV_ADDR)); |
| 86 | #endif |
| 87 | |
| 88 | return size ? size : 1; |
| 89 | } |
| 90 | |
| 91 | /*----------------------------------------------------------------------- |
| 92 | */ |
| 93 | static void flash_reset(flash_info_t *info) |
| 94 | { |
| 95 | FPWV *base = (FPWV *)(info->start[0]); |
| 96 | |
| 97 | /* Put FLASH back in read mode */ |
| 98 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) |
| 99 | *base = (FPW)0x00FF00FF; /* Intel Read Mode */ |
| 100 | else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) |
| 101 | *base = (FPW)0x00F000F0; /* AMD Read Mode */ |
| 102 | } |
| 103 | |
| 104 | /*----------------------------------------------------------------------- |
| 105 | */ |
| 106 | |
| 107 | static flash_info_t *flash_get_info(ulong base) |
| 108 | { |
| 109 | int i; |
| 110 | flash_info_t * info; |
| 111 | |
| 112 | for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { |
| 113 | info = & flash_info[i]; |
| 114 | if (info->size && info->start[0] <= base && |
| 115 | base <= info->start[0] + info->size - 1) |
| 116 | break; |
| 117 | } |
| 118 | |
| 119 | return i == CFG_MAX_FLASH_BANKS ? 0 : info; |
| 120 | } |
| 121 | |
| 122 | /*----------------------------------------------------------------------- |
| 123 | */ |
| 124 | |
| 125 | void flash_print_info (flash_info_t *info) |
| 126 | { |
| 127 | int i; |
| 128 | |
| 129 | if (info->flash_id == FLASH_UNKNOWN) { |
| 130 | printf ("missing or unknown FLASH type\n"); |
| 131 | return; |
| 132 | } |
| 133 | |
| 134 | switch (info->flash_id & FLASH_VENDMASK) { |
| 135 | case FLASH_MAN_AMD: printf ("AMD "); break; |
| 136 | case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; |
| 137 | case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
| 138 | case FLASH_MAN_SST: printf ("SST "); break; |
| 139 | case FLASH_MAN_STM: printf ("STM "); break; |
| 140 | case FLASH_MAN_INTEL: printf ("INTEL "); break; |
| 141 | default: printf ("Unknown Vendor "); break; |
| 142 | } |
| 143 | |
| 144 | switch (info->flash_id & FLASH_TYPEMASK) { |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 145 | case FLASH_AM116DB: |
| 146 | printf ("AM29LV116DB (16Mbit, bottom boot sect)\n"); |
| 147 | break; |
wdenk | 138ff60 | 2004-12-16 15:52:40 +0000 | [diff] [blame] | 148 | case FLASH_AMLV128U: |
| 149 | printf ("AM29LV128ML (128Mbit, uniform sector size)\n"); |
| 150 | break; |
| 151 | case FLASH_AM160B: |
| 152 | printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
| 153 | break; |
| 154 | default: |
| 155 | printf ("Unknown Chip Type\n"); |
| 156 | break; |
| 157 | } |
| 158 | |
| 159 | printf (" Size: %ld MB in %d Sectors\n", |
| 160 | info->size >> 20, |
| 161 | info->sector_count); |
| 162 | |
| 163 | printf (" Sector Start Addresses:"); |
| 164 | |
| 165 | for (i=0; i<info->sector_count; ++i) { |
| 166 | if ((i % 5) == 0) { |
| 167 | printf ("\n "); |
| 168 | } |
| 169 | printf (" %08lX%s", |
| 170 | info->start[i], |
| 171 | info->protect[i] ? " (RO)" : " "); |
| 172 | } |
| 173 | printf ("\n"); |
| 174 | return; |
| 175 | } |
| 176 | |
| 177 | /*----------------------------------------------------------------------- |
| 178 | */ |
| 179 | |
| 180 | /* |
| 181 | * The following code cannot be run from FLASH! |
| 182 | */ |
| 183 | |
| 184 | ulong flash_get_size (FPWV *addr, flash_info_t *info) |
| 185 | { |
| 186 | int i; |
| 187 | ulong base = (ulong)addr; |
| 188 | |
| 189 | /* Write auto select command: read Manufacturer ID */ |
| 190 | /* Write auto select command sequence and test FLASH answer */ |
| 191 | addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */ |
| 192 | addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */ |
| 193 | addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */ |
| 194 | |
| 195 | /* The manufacturer codes are only 1 byte, so just use 1 byte. |
| 196 | * This works for any bus width and any FLASH device width. |
| 197 | */ |
| 198 | udelay(100); |
| 199 | switch (addr[0] & 0xff) { |
| 200 | |
| 201 | case (uchar)AMD_MANUFACT: |
| 202 | debug ("Manufacturer: AMD (Spansion)\n"); |
| 203 | info->flash_id = FLASH_MAN_AMD; |
| 204 | break; |
| 205 | |
| 206 | case (uchar)INTEL_MANUFACT: |
| 207 | debug ("Manufacturer: Intel (not supported yet)\n"); |
| 208 | info->flash_id = FLASH_MAN_INTEL; |
| 209 | break; |
| 210 | |
| 211 | default: |
| 212 | info->flash_id = FLASH_UNKNOWN; |
| 213 | info->sector_count = 0; |
| 214 | info->size = 0; |
| 215 | break; |
| 216 | } |
| 217 | |
| 218 | /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ |
| 219 | if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) { |
| 220 | |
| 221 | case (uchar)AMD_ID_LV116DB: |
| 222 | debug ("Chip: AM29LV116DB\n"); |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 223 | info->flash_id += FLASH_AM116DB; |
| 224 | info->sector_count = 35; |
| 225 | info->size = 0x00200000; |
| 226 | /* |
| 227 | * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all |
| 228 | * the other ones are 64 kB |
| 229 | */ |
| 230 | info->start[0] = base + 0x00000000; |
| 231 | info->start[1] = base + 0x00004000; |
| 232 | info->start[2] = base + 0x00006000; |
| 233 | info->start[3] = base + 0x00008000; |
| 234 | for( i = 4; i < info->sector_count; i++ ) |
| 235 | info->start[i] = |
| 236 | base + (i * (64 << 10)) - 0x00030000; |
| 237 | break; /* => 2 MB */ |
wdenk | 138ff60 | 2004-12-16 15:52:40 +0000 | [diff] [blame] | 238 | |
| 239 | case (FPW)AMD_ID_LV160B: |
| 240 | debug ("Chip: AM29LV160MB\n"); |
| 241 | info->flash_id += FLASH_AM160B; |
| 242 | info->sector_count = 35; |
| 243 | info->size = 0x00400000; |
| 244 | /* |
| 245 | * The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all |
| 246 | * the other ones are 64 kB |
| 247 | */ |
| 248 | info->start[0] = base + 0x00000000; |
| 249 | info->start[1] = base + 0x00008000; |
| 250 | info->start[2] = base + 0x0000C000; |
| 251 | info->start[3] = base + 0x00010000; |
| 252 | for( i = 4; i < info->sector_count; i++ ) |
| 253 | info->start[i] = |
| 254 | base + (i * 2 * (64 << 10)) - 0x00060000; |
| 255 | break; /* => 4 MB */ |
| 256 | |
| 257 | default: |
| 258 | info->flash_id = FLASH_UNKNOWN; |
| 259 | info->sector_count = 0; |
| 260 | info->size = 0; |
| 261 | } |
| 262 | |
| 263 | /* Put FLASH back in read mode */ |
| 264 | flash_reset(info); |
| 265 | |
| 266 | return (info->size); |
| 267 | } |
| 268 | |
| 269 | /*----------------------------------------------------------------------- |
| 270 | */ |
| 271 | |
| 272 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
| 273 | { |
| 274 | FPWV *addr = (FPWV*)(info->start[0]); |
| 275 | int flag, prot, sect, l_sect; |
| 276 | ulong start, now, last; |
| 277 | |
| 278 | debug ("flash_erase: first: %d last: %d\n", s_first, s_last); |
| 279 | |
| 280 | if ((s_first < 0) || (s_first > s_last)) { |
| 281 | if (info->flash_id == FLASH_UNKNOWN) { |
| 282 | printf ("- missing\n"); |
| 283 | } else { |
| 284 | printf ("- no sectors to erase\n"); |
| 285 | } |
| 286 | return 1; |
| 287 | } |
| 288 | |
| 289 | if ((info->flash_id == FLASH_UNKNOWN) || |
| 290 | (info->flash_id > FLASH_AMD_COMP)) { |
| 291 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 292 | info->flash_id); |
| 293 | return 1; |
| 294 | } |
| 295 | |
| 296 | prot = 0; |
| 297 | for (sect=s_first; sect<=s_last; ++sect) { |
| 298 | if (info->protect[sect]) { |
| 299 | prot++; |
| 300 | } |
| 301 | } |
| 302 | |
| 303 | if (prot) { |
| 304 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 305 | prot); |
| 306 | } else { |
| 307 | printf ("\n"); |
| 308 | } |
| 309 | |
| 310 | l_sect = -1; |
| 311 | |
| 312 | /* Disable interrupts which might cause a timeout here */ |
| 313 | flag = disable_interrupts(); |
| 314 | |
| 315 | addr[0x0555] = (FPW)0x00AA00AA; |
| 316 | addr[0x02AA] = (FPW)0x00550055; |
| 317 | addr[0x0555] = (FPW)0x00800080; |
| 318 | addr[0x0555] = (FPW)0x00AA00AA; |
| 319 | addr[0x02AA] = (FPW)0x00550055; |
| 320 | |
| 321 | /* Start erase on unprotected sectors */ |
| 322 | for (sect = s_first; sect<=s_last; sect++) { |
| 323 | if (info->protect[sect] == 0) { /* not protected */ |
| 324 | addr = (FPWV*)(info->start[sect]); |
| 325 | addr[0] = (FPW)0x00300030; |
| 326 | l_sect = sect; |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | /* re-enable interrupts if necessary */ |
| 331 | if (flag) |
| 332 | enable_interrupts(); |
| 333 | |
| 334 | /* wait at least 80us - let's wait 1 ms */ |
| 335 | udelay (1000); |
| 336 | |
| 337 | /* |
| 338 | * We wait for the last triggered sector |
| 339 | */ |
| 340 | if (l_sect < 0) |
| 341 | goto DONE; |
| 342 | |
| 343 | start = get_timer (0); |
| 344 | last = start; |
| 345 | addr = (FPWV*)(info->start[l_sect]); |
| 346 | while ((addr[0] & (FPW)0x00800080) != (FPW)0x00800080) { |
| 347 | if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { |
| 348 | printf ("Timeout\n"); |
| 349 | return 1; |
| 350 | } |
| 351 | /* show that we're waiting */ |
| 352 | if ((now - last) > 1000) { /* every second */ |
| 353 | putc ('.'); |
| 354 | last = now; |
| 355 | } |
| 356 | } |
| 357 | |
| 358 | DONE: |
| 359 | /* reset to read mode */ |
| 360 | addr = (FPWV*)info->start[0]; |
| 361 | addr[0] = (FPW)0x00F000F0; /* reset bank */ |
| 362 | |
| 363 | printf (" done\n"); |
| 364 | return 0; |
| 365 | } |
| 366 | |
| 367 | /*----------------------------------------------------------------------- |
| 368 | * Copy memory to flash, returns: |
| 369 | * 0 - OK |
| 370 | * 1 - write timeout |
| 371 | * 2 - Flash not erased |
| 372 | */ |
| 373 | |
| 374 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 375 | { |
| 376 | int i, rc = 0; |
| 377 | |
| 378 | for (i = 0; i < cnt; i++) |
| 379 | if ((rc = write_word_amd(info, (FPW *)(addr+i), src[i])) != 0) { |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 380 | return (rc); |
| 381 | } |
wdenk | 138ff60 | 2004-12-16 15:52:40 +0000 | [diff] [blame] | 382 | |
| 383 | return rc; |
| 384 | } |
| 385 | |
| 386 | /*----------------------------------------------------------------------- |
| 387 | * Write a word to Flash for AMD FLASH |
| 388 | * A word is 16 or 32 bits, whichever the bus width of the flash bank |
| 389 | * (not an individual chip) is. |
| 390 | * |
| 391 | * returns: |
| 392 | * 0 - OK |
| 393 | * 1 - write timeout |
| 394 | * 2 - Flash not erased |
| 395 | */ |
| 396 | static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) |
| 397 | { |
| 398 | ulong start; |
| 399 | int flag; |
| 400 | FPWV *base; /* first address in flash bank */ |
| 401 | |
| 402 | /* Check if Flash is (sufficiently) erased */ |
| 403 | if ((*dest & data) != data) { |
| 404 | return (2); |
| 405 | } |
| 406 | |
| 407 | base = (FPWV *)(info->start[0]); |
| 408 | |
| 409 | /* Disable interrupts which might cause a timeout here */ |
| 410 | flag = disable_interrupts(); |
| 411 | |
| 412 | base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ |
| 413 | base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ |
| 414 | base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */ |
| 415 | |
| 416 | *dest = data; /* start programming the data */ |
| 417 | |
| 418 | /* re-enable interrupts if necessary */ |
| 419 | if (flag) |
| 420 | enable_interrupts(); |
| 421 | |
| 422 | start = get_timer (0); |
| 423 | |
| 424 | /* data polling for D7 */ |
| 425 | while ((*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) { |
| 426 | if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { |
| 427 | *dest = (FPW)0x00F000F0; /* reset bank */ |
| 428 | return (1); |
| 429 | } |
| 430 | } |
| 431 | return (0); |
| 432 | } |