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wdenkdc7c9a12003-03-26 06:55:25 +00001/*
2 * (C) Copyright 2002
3 * Lineo, Inc <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 *
30 */
31
32#include <common.h>
wdenk85ec0bc2003-03-31 16:34:49 +000033#include <asm/io.h>
wdenkb783eda2003-06-25 22:26:29 +000034#include <asm/arch/hardware.h>
wdenkdc7c9a12003-03-26 06:55:25 +000035
Wolfgang Denkd87080b2006-03-31 18:32:53 +020036DECLARE_GLOBAL_DATA_PTR;
37
wdenk2cbe5712004-10-10 17:05:18 +000038#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1)
39#error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1
wdenk4734cb72004-09-21 23:33:32 +000040#endif
41
wdenkdc7c9a12003-03-26 06:55:25 +000042/* ggi thunder */
wdenk4734cb72004-09-21 23:33:32 +000043#ifdef CONFIG_DBGU
wdenkdc7c9a12003-03-26 06:55:25 +000044AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
wdenk4734cb72004-09-21 23:33:32 +000045#endif
wdenk2cbe5712004-10-10 17:05:18 +000046#ifdef CONFIG_USART0
47AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US0;
48#endif
wdenk4734cb72004-09-21 23:33:32 +000049#ifdef CONFIG_USART1
50AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1;
51#endif
wdenkdc7c9a12003-03-26 06:55:25 +000052
wdenkd9df1f42004-03-15 09:00:01 +000053void serial_setbrg (void)
54{
wdenkd9df1f42004-03-15 09:00:01 +000055 int baudrate;
wdenkdc7c9a12003-03-26 06:55:25 +000056
wdenk2cbe5712004-10-10 17:05:18 +000057 if ((baudrate = gd->baudrate) <= 0)
wdenkd9df1f42004-03-15 09:00:01 +000058 baudrate = CONFIG_BAUDRATE;
wdenkec0ca732005-04-20 12:36:05 +000059 /* MASTER_CLOCK/(16 * baudrate) */
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +020060 us->US_BRGR = (AT91C_MASTER_CLOCK >> 4) / (unsigned)baudrate;
wdenkd9df1f42004-03-15 09:00:01 +000061}
wdenkdc7c9a12003-03-26 06:55:25 +000062
wdenkd9df1f42004-03-15 09:00:01 +000063int serial_init (void)
64{
65 /* make any port initializations specific to this port */
wdenk4734cb72004-09-21 23:33:32 +000066#ifdef CONFIG_DBGU
wdenkd9df1f42004-03-15 09:00:01 +000067 *AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD; /* PA 31 & 30 */
68 *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */
wdenk4734cb72004-09-21 23:33:32 +000069#endif
wdenk2cbe5712004-10-10 17:05:18 +000070#ifdef CONFIG_USART0
71 *AT91C_PIOA_PDR = AT91C_PA17_TXD0 | AT91C_PA18_RXD0;
72 *AT91C_PMC_PCER |= 1 << AT91C_ID_USART0; /* enable clock */
73#endif
wdenk4734cb72004-09-21 23:33:32 +000074#ifdef CONFIG_USART1
75 *AT91C_PIOB_PDR = AT91C_PB21_TXD1 | AT91C_PB20_RXD1;
76 *AT91C_PMC_PCER |= 1 << AT91C_ID_USART1; /* enable clock */
77#endif
wdenkd9df1f42004-03-15 09:00:01 +000078 serial_setbrg ();
wdenkdc7c9a12003-03-26 06:55:25 +000079
wdenkd9df1f42004-03-15 09:00:01 +000080 us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
81 us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
82 us->US_MR =
83 (AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
84 AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
85 us->US_IMR = ~0ul;
86 return (0);
87}
wdenkdc7c9a12003-03-26 06:55:25 +000088
Jean-Christophe PLAGNIOL-VILLARD35240492009-03-27 23:26:43 +010089void serial_exit (void)
90{
91 us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
92}
93
wdenkd9df1f42004-03-15 09:00:01 +000094void serial_putc (const char c)
95{
96 if (c == '\n')
97 serial_putc ('\r');
98 while ((us->US_CSR & AT91C_US_TXRDY) == 0);
99 us->US_THR = c;
100}
wdenkdc7c9a12003-03-26 06:55:25 +0000101
wdenkd9df1f42004-03-15 09:00:01 +0000102void serial_puts (const char *s)
103{
104 while (*s) {
105 serial_putc (*s++);
106 }
107}
wdenkdc7c9a12003-03-26 06:55:25 +0000108
wdenkd9df1f42004-03-15 09:00:01 +0000109int serial_getc (void)
110{
111 while ((us->US_CSR & AT91C_US_RXRDY) == 0);
112 return us->US_RHR;
113}
wdenkdc7c9a12003-03-26 06:55:25 +0000114
wdenkd9df1f42004-03-15 09:00:01 +0000115int serial_tstc (void)
116{
117 return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
118}