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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marcel Ziswilera2777ec2016-11-16 17:49:22 +01002/*
Gerard Salvatella08f80552019-04-09 17:24:07 +02003 * Copyright (c) 2016-2019 Toradex, Inc.
Marcel Ziswilera2777ec2016-11-16 17:49:22 +01004 */
5
6#include <common.h>
7#include "tdx-cfg-block.h"
8
Marcel Ziswiler4adc9fc2019-04-09 17:25:32 +02009#if defined(CONFIG_TARGET_APALIS_IMX6) || \
Marcel Ziswiler9d63c7d2019-07-12 12:35:08 +020010 defined(CONFIG_TARGET_APALIS_IMX8) || \
Marcel Ziswiler4adc9fc2019-04-09 17:25:32 +020011 defined(CONFIG_TARGET_COLIBRI_IMX6) || \
Marcel Ziswiler6c297ee2019-07-12 12:35:07 +020012 defined(CONFIG_TARGET_COLIBRI_IMX8X)
Marcel Ziswilera2777ec2016-11-16 17:49:22 +010013#include <asm/arch/sys_proto.h>
14#else
15#define is_cpu_type(cpu) (0)
16#endif
17#if defined(CONFIG_CPU_PXA27X)
18#include <asm/arch-pxa/pxa.h>
19#else
20#define cpu_is_pxa27x(cpu) (0)
21#endif
22#include <cli.h>
23#include <console.h>
Simon Glass7b51b572019-08-01 09:46:52 -060024#include <env.h>
Marcel Ziswilera2777ec2016-11-16 17:49:22 +010025#include <flash.h>
26#include <malloc.h>
27#include <mmc.h>
28#include <nand.h>
Simon Glassc62db352017-05-31 19:47:48 -060029#include <asm/mach-types.h>
Marcel Ziswilera2777ec2016-11-16 17:49:22 +010030
31DECLARE_GLOBAL_DATA_PTR;
32
33#define TAG_VALID 0xcf01
34#define TAG_MAC 0x0000
35#define TAG_HW 0x0008
36#define TAG_INVALID 0xffff
37
38#define TAG_FLAG_VALID 0x1
39
40#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
41#define TDX_CFG_BLOCK_MAX_SIZE 512
42#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
43#define TDX_CFG_BLOCK_MAX_SIZE 64
44#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
45#define TDX_CFG_BLOCK_MAX_SIZE 64
46#else
47#error Toradex config block location not set
48#endif
49
50struct toradex_tag {
51 u32 len:14;
52 u32 flags:2;
53 u32 id:16;
54};
55
56bool valid_cfgblock;
57struct toradex_hw tdx_hw_tag;
58struct toradex_eth_addr tdx_eth_addr;
59u32 tdx_serial;
60
61const char * const toradex_modules[] = {
62 [0] = "UNKNOWN MODULE",
63 [1] = "Colibri PXA270 312MHz",
64 [2] = "Colibri PXA270 520MHz",
65 [3] = "Colibri PXA320 806MHz",
66 [4] = "Colibri PXA300 208MHz",
67 [5] = "Colibri PXA310 624MHz",
68 [6] = "Colibri PXA320 806MHz IT",
69 [7] = "Colibri PXA300 208MHz XT",
70 [8] = "Colibri PXA270 312MHz",
71 [9] = "Colibri PXA270 520MHz",
72 [10] = "Colibri VF50 128MB", /* not currently on sale */
73 [11] = "Colibri VF61 256MB",
74 [12] = "Colibri VF61 256MB IT",
75 [13] = "Colibri VF50 128MB IT",
76 [14] = "Colibri iMX6 Solo 256MB",
77 [15] = "Colibri iMX6 DualLite 512MB",
78 [16] = "Colibri iMX6 Solo 256MB IT",
79 [17] = "Colibri iMX6 DualLite 512MB IT",
80 [18] = "UNKNOWN MODULE",
81 [19] = "UNKNOWN MODULE",
82 [20] = "Colibri T20 256MB",
83 [21] = "Colibri T20 512MB",
84 [22] = "Colibri T20 512MB IT",
85 [23] = "Colibri T30 1GB",
86 [24] = "Colibri T20 256MB IT",
87 [25] = "Apalis T30 2GB",
88 [26] = "Apalis T30 1GB",
89 [27] = "Apalis iMX6 Quad 1GB",
90 [28] = "Apalis iMX6 Quad 2GB IT",
91 [29] = "Apalis iMX6 Dual 512MB",
92 [30] = "Colibri T30 1GB IT",
93 [31] = "Apalis T30 1GB IT",
94 [32] = "Colibri iMX7 Solo 256MB",
95 [33] = "Colibri iMX7 Dual 512MB",
96 [34] = "Apalis TK1 2GB",
97 [35] = "Apalis iMX6 Dual 1GB IT",
Stefan Agnerd826b872018-05-30 19:01:47 +020098 [36] = "Colibri iMX6ULL 256MB",
Marcel Ziswiler4adc9fc2019-04-09 17:25:32 +020099 [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT",
100 [38] = "Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
Stefan Agnerd826b872018-05-30 19:01:47 +0200101 [39] = "Colibri iMX7 Dual 1GB (eMMC)",
Marcel Ziswiler4adc9fc2019-04-09 17:25:32 +0200102 [40] = "Colibri iMX6ULL 512MB Wi-Fi / BT IT",
Stefan Agnerd826b872018-05-30 19:01:47 +0200103 [41] = "Colibri iMX7 Dual 512MB EPDC",
104 [42] = "Apalis TK1 4GB",
Gerard Salvatella08f80552019-04-09 17:24:07 +0200105 [43] = "Colibri T20 512MB IT SETEK",
106 [44] = "Colibri iMX6ULL 512MB IT",
107 [45] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth",
Marcel Ziswiler6988a3a2019-04-09 17:25:33 +0200108 [46] = "Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
109 [47] = "Apalis iMX8 QuadMax 4GB IT",
110 [48] = "Apalis iMX8 QuadPlus 2GB Wi-Fi / BT",
111 [49] = "Apalis iMX8 QuadPlus 2GB",
112 [50] = "Colibri iMX8 QuadXPlus 2GB IT",
113 [51] = "Colibri iMX8 DualX 1GB Wi-Fi / Bluetooth",
114 [52] = "Colibri iMX8 DualX 1GB",
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100115};
116
117#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
118static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
119{
120 struct mmc *mmc;
121 int dev = CONFIG_TDX_CFG_BLOCK_DEV;
122 int offset = CONFIG_TDX_CFG_BLOCK_OFFSET;
123 uint part = CONFIG_TDX_CFG_BLOCK_PART;
124 uint blk_start;
125 int ret = 0;
126
127 /* Read production parameter config block from eMMC */
128 mmc = find_mmc_device(dev);
129 if (!mmc) {
130 puts("No MMC card found\n");
131 ret = -ENODEV;
132 goto out;
133 }
Stefan Agner42a4f182019-07-12 12:35:05 +0200134 if (mmc_init(mmc)) {
135 puts("MMC init failed\n");
136 return -EINVAL;
137 }
Simon Glass0e513e72017-04-23 20:02:11 -0600138 if (part != mmc_get_blk_desc(mmc)->hwpart) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100139 if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
140 puts("MMC partition switch failed\n");
141 ret = -ENODEV;
142 goto out;
143 }
144 }
145 if (offset < 0)
146 offset += mmc->capacity;
147 blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
148
149 if (!write) {
150 /* Careful reads a whole block of 512 bytes into config_block */
151 if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1,
152 (unsigned char *)config_block) != 1) {
153 ret = -EIO;
154 goto out;
155 }
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100156 } else {
157 /* Just writing one 512 byte block */
158 if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
159 (unsigned char *)config_block) != 1) {
160 ret = -EIO;
161 goto out;
162 }
163 }
164
165out:
166 /* Switch back to regular eMMC user partition */
167 blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0);
168
169 return ret;
170}
171#endif
172
173#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND
174static int read_tdx_cfg_block_from_nand(unsigned char *config_block)
175{
176 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
Stefan Agnerbc53fb12018-08-06 09:19:18 +0200177 struct mtd_info *mtd = get_nand_dev_by_index(0);
178
179 if (!mtd)
180 return -ENODEV;
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100181
182 /* Read production parameter config block from NAND page */
Stefan Agnerbc53fb12018-08-06 09:19:18 +0200183 return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET,
Grygorii Strashkobf264cd2017-06-26 19:13:06 -0500184 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
185 config_block);
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100186}
187
188static int write_tdx_cfg_block_to_nand(unsigned char *config_block)
189{
190 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
191
192 /* Write production parameter config block to NAND page */
Grygorii Strashkobf264cd2017-06-26 19:13:06 -0500193 return nand_write_skip_bad(get_nand_dev_by_index(0),
194 CONFIG_TDX_CFG_BLOCK_OFFSET,
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100195 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
196 config_block, WITH_WR_VERIFY);
197}
198#endif
199
200#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR
201static int read_tdx_cfg_block_from_nor(unsigned char *config_block)
202{
203 /* Read production parameter config block from NOR flash */
204 memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET,
205 TDX_CFG_BLOCK_MAX_SIZE);
206 return 0;
207}
208
209static int write_tdx_cfg_block_to_nor(unsigned char *config_block)
210{
211 /* Write production parameter config block to NOR flash */
212 return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET,
213 TDX_CFG_BLOCK_MAX_SIZE);
214}
215#endif
216
217int read_tdx_cfg_block(void)
218{
219 int ret = 0;
220 u8 *config_block = NULL;
221 struct toradex_tag *tag;
222 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
223 int offset;
224
225 /* Allocate RAM area for config block */
226 config_block = memalign(ARCH_DMA_MINALIGN, size);
227 if (!config_block) {
228 printf("Not enough malloc space available!\n");
229 return -ENOMEM;
230 }
231
232 memset(config_block, 0, size);
233
234#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
235 ret = tdx_cfg_block_mmc_storage(config_block, 0);
236#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
237 ret = read_tdx_cfg_block_from_nand(config_block);
238#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
239 ret = read_tdx_cfg_block_from_nor(config_block);
240#else
241 ret = -EINVAL;
242#endif
243 if (ret)
244 goto out;
245
246 /* Expect a valid tag first */
247 tag = (struct toradex_tag *)config_block;
248 if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) {
249 valid_cfgblock = false;
250 ret = -EINVAL;
251 goto out;
252 }
253 valid_cfgblock = true;
254 offset = 4;
255
256 while (offset < TDX_CFG_BLOCK_MAX_SIZE) {
257 tag = (struct toradex_tag *)(config_block + offset);
258 offset += 4;
259 if (tag->id == TAG_INVALID)
260 break;
261
262 if (tag->flags == TAG_FLAG_VALID) {
263 switch (tag->id) {
264 case TAG_MAC:
265 memcpy(&tdx_eth_addr, config_block + offset,
266 6);
267
268 /* NIC part of MAC address is serial number */
269 tdx_serial = ntohl(tdx_eth_addr.nic) >> 8;
270 break;
271 case TAG_HW:
272 memcpy(&tdx_hw_tag, config_block + offset, 8);
273 break;
274 }
275 }
276
277 /* Get to next tag according to current tags length */
278 offset += tag->len * 4;
279 }
280
281 /* Cap product id to avoid issues with a yet unknown one */
Marcel Ziswilerccdd3712019-03-25 17:18:29 +0100282 if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) /
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100283 sizeof(toradex_modules[0])))
284 tdx_hw_tag.prodid = 0;
285
286out:
287 free(config_block);
288 return ret;
289}
290
291static int get_cfgblock_interactive(void)
292{
293 char message[CONFIG_SYS_CBSIZE];
294 char *soc;
295 char it = 'n';
Marcel Ziswilerd1aa14442019-07-12 12:35:06 +0200296 char wb = 'n';
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100297 int len;
298
Stefan Agner89315f32019-04-09 17:24:08 +0200299 /* Unknown module by default */
300 tdx_hw_tag.prodid = 0;
301
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100302 if (cpu_is_pxa27x())
303 sprintf(message, "Is the module the 312 MHz version? [y/N] ");
304 else
305 sprintf(message, "Is the module an IT version? [y/N] ");
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100306 len = cli_readline(message);
307 it = console_buffer[0];
308
Marcel Ziswilerd1aa14442019-07-12 12:35:06 +0200309#if defined(CONFIG_TARGET_APALIS_IMX8) || \
310 defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
311 defined(CONFIG_TARGET_COLIBRI_IMX8X)
312 sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] ");
313 len = cli_readline(message);
314 wb = console_buffer[0];
315#endif
316
Simon Glass00caae62017-08-03 12:22:12 -0600317 soc = env_get("soc");
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100318 if (!strcmp("mx6", soc)) {
Stefan Agner89315f32019-04-09 17:24:08 +0200319#ifdef CONFIG_TARGET_APALIS_IMX6
320 if (it == 'y' || it == 'Y') {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100321 if (is_cpu_type(MXC_CPU_MX6Q))
322 tdx_hw_tag.prodid = APALIS_IMX6Q_IT;
323 else
324 tdx_hw_tag.prodid = APALIS_IMX6D_IT;
Stefan Agner89315f32019-04-09 17:24:08 +0200325 } else {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100326 if (is_cpu_type(MXC_CPU_MX6Q))
327 tdx_hw_tag.prodid = APALIS_IMX6Q;
328 else
329 tdx_hw_tag.prodid = APALIS_IMX6D;
Stefan Agner89315f32019-04-09 17:24:08 +0200330 }
331#elif CONFIG_TARGET_COLIBRI_IMX6
332 if (it == 'y' || it == 'Y') {
333 if (is_cpu_type(MXC_CPU_MX6DL))
334 tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT;
335 else if (is_cpu_type(MXC_CPU_MX6SOLO))
336 tdx_hw_tag.prodid = COLIBRI_IMX6S_IT;
337 } else {
338 if (is_cpu_type(MXC_CPU_MX6DL))
339 tdx_hw_tag.prodid = COLIBRI_IMX6DL;
340 else if (is_cpu_type(MXC_CPU_MX6SOLO))
341 tdx_hw_tag.prodid = COLIBRI_IMX6S;
342 }
343#elif CONFIG_TARGET_COLIBRI_IMX6ULL
Gerard Salvatella08f80552019-04-09 17:24:07 +0200344 if (it == 'y' || it == 'Y') {
Stefan Agner89315f32019-04-09 17:24:08 +0200345 if (wb == 'y' || wb == 'Y')
346 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT;
347 else
348 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT;
Gerard Salvatella08f80552019-04-09 17:24:07 +0200349 } else {
Stefan Agner89315f32019-04-09 17:24:08 +0200350 if (wb == 'y' || wb == 'Y')
351 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT;
352 else
353 tdx_hw_tag.prodid = COLIBRI_IMX6ULL;
Gerard Salvatella08f80552019-04-09 17:24:07 +0200354 }
Stefan Agner89315f32019-04-09 17:24:08 +0200355#endif
Gerard Salvatella08f80552019-04-09 17:24:07 +0200356 } else if (!strcmp("imx7d", soc))
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100357 tdx_hw_tag.prodid = COLIBRI_IMX7D;
Gerard Salvatella08f80552019-04-09 17:24:07 +0200358 else if (!strcmp("imx7s", soc))
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100359 tdx_hw_tag.prodid = COLIBRI_IMX7S;
Marcel Ziswiler9d63c7d2019-07-12 12:35:08 +0200360 else if (is_cpu_type(MXC_CPU_IMX8QM)) {
361 if (it == 'y' || it == 'Y') {
362 if (wb == 'y' || wb == 'Y')
363 tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
364 else
365 tdx_hw_tag.prodid = APALIS_IMX8QM_IT;
366 } else {
367 if (wb == 'y' || wb == 'Y')
368 tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT;
369 else
370 tdx_hw_tag.prodid = APALIS_IMX8QP;
371 }
372 } else if (is_cpu_type(MXC_CPU_IMX8QXP)) {
Marcel Ziswiler6c297ee2019-07-12 12:35:07 +0200373 if (it == 'y' || it == 'Y') {
374 if (wb == 'y' || wb == 'Y')
375 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
376 else
377 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT;
378 } else {
379 if (wb == 'y' || wb == 'Y')
380 tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT;
381 else
382 tdx_hw_tag.prodid = COLIBRI_IMX8DX;
383 }
384 } else if (!strcmp("tegra20", soc)) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100385 if (it == 'y' || it == 'Y')
386 if (gd->ram_size == 0x10000000)
387 tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT;
388 else
389 tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT;
390 else
391 if (gd->ram_size == 0x10000000)
392 tdx_hw_tag.prodid = COLIBRI_T20_256MB;
393 else
394 tdx_hw_tag.prodid = COLIBRI_T20_512MB;
395 } else if (cpu_is_pxa27x()) {
396 if (it == 'y' || it == 'Y')
397 tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ;
398 else
399 tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
Gerard Salvatella08f80552019-04-09 17:24:07 +0200400 }
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100401#ifdef CONFIG_MACH_TYPE
Gerard Salvatella08f80552019-04-09 17:24:07 +0200402 else if (!strcmp("tegra30", soc)) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100403 if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) {
404 if (it == 'y' || it == 'Y')
405 tdx_hw_tag.prodid = APALIS_T30_IT;
406 else
407 if (gd->ram_size == 0x40000000)
408 tdx_hw_tag.prodid = APALIS_T30_1GB;
409 else
410 tdx_hw_tag.prodid = APALIS_T30_2GB;
411 } else {
412 if (it == 'y' || it == 'Y')
413 tdx_hw_tag.prodid = COLIBRI_T30_IT;
414 else
415 tdx_hw_tag.prodid = COLIBRI_T30;
416 }
Gerard Salvatella08f80552019-04-09 17:24:07 +0200417 }
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100418#endif /* CONFIG_MACH_TYPE */
Gerard Salvatella08f80552019-04-09 17:24:07 +0200419 else if (!strcmp("tegra124", soc)) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100420 tdx_hw_tag.prodid = APALIS_TK1_2GB;
421 } else if (!strcmp("vf500", soc)) {
422 if (it == 'y' || it == 'Y')
423 tdx_hw_tag.prodid = COLIBRI_VF50_IT;
424 else
425 tdx_hw_tag.prodid = COLIBRI_VF50;
426 } else if (!strcmp("vf610", soc)) {
427 if (it == 'y' || it == 'Y')
428 tdx_hw_tag.prodid = COLIBRI_VF61_IT;
429 else
430 tdx_hw_tag.prodid = COLIBRI_VF61;
Stefan Agner89315f32019-04-09 17:24:08 +0200431 }
432
433 if (!tdx_hw_tag.prodid) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100434 printf("Module type not detectable due to unknown SoC\n");
435 return -1;
436 }
437
438 while (len < 4) {
439 sprintf(message, "Enter the module version (e.g. V1.1B): V");
440 len = cli_readline(message);
441 }
442
443 tdx_hw_tag.ver_major = console_buffer[0] - '0';
444 tdx_hw_tag.ver_minor = console_buffer[2] - '0';
445 tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
446
Gerard Salvatella08f80552019-04-09 17:24:07 +0200447 if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100448 tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
449 COLIBRI_PXA270_V1_312MHZ);
450
451 while (len < 8) {
452 sprintf(message, "Enter module serial number: ");
453 len = cli_readline(message);
454 }
455
456 tdx_serial = simple_strtoul(console_buffer, NULL, 10);
457
458 return 0;
459}
460
461static int get_cfgblock_barcode(char *barcode)
462{
463 if (strlen(barcode) < 16) {
464 printf("Argument too short, barcode is 16 chars long\n");
465 return -1;
466 }
467
468 /* Get hardware information from the first 8 digits */
469 tdx_hw_tag.ver_major = barcode[4] - '0';
470 tdx_hw_tag.ver_minor = barcode[5] - '0';
471 tdx_hw_tag.ver_assembly = barcode[7] - '0';
472
473 barcode[4] = '\0';
474 tdx_hw_tag.prodid = simple_strtoul(barcode, NULL, 10);
475
476 /* Parse second part of the barcode (serial number */
477 barcode += 8;
478 tdx_serial = simple_strtoul(barcode, NULL, 10);
479
480 return 0;
481}
482
483static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
484 char * const argv[])
485{
486 u8 *config_block;
487 struct toradex_tag *tag;
488 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
489 int offset = 0;
490 int ret = CMD_RET_SUCCESS;
491 int err;
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100492 int force_overwrite = 0;
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100493
494 /* Allocate RAM area for config block */
495 config_block = memalign(ARCH_DMA_MINALIGN, size);
496 if (!config_block) {
497 printf("Not enough malloc space available!\n");
498 return CMD_RET_FAILURE;
499 }
500
501 memset(config_block, 0xff, size);
502
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100503 if (argc >= 3) {
504 if (argv[2][0] == '-' && argv[2][1] == 'y')
505 force_overwrite = 1;
506 }
507
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100508 read_tdx_cfg_block();
509 if (valid_cfgblock) {
510#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
511 /*
512 * On NAND devices, recreation is only allowed if the page is
513 * empty (config block invalid...)
514 */
Marcel Ziswiler9d364eb2019-07-12 12:35:09 +0200515 printf("NAND erase block %d need to be erased before creating a Toradex config block\n",
Grygorii Strashkobf264cd2017-06-26 19:13:06 -0500516 CONFIG_TDX_CFG_BLOCK_OFFSET /
517 get_nand_dev_by_index(0)->erasesize);
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100518 goto out;
519#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
520 /*
521 * On NOR devices, recreation is only allowed if the sector is
522 * empty and write protection is off (config block invalid...)
523 */
Marcel Ziswiler9d364eb2019-07-12 12:35:09 +0200524 printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n",
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100525 CONFIG_TDX_CFG_BLOCK_OFFSET);
526 goto out;
527#else
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100528 if (!force_overwrite) {
529 char message[CONFIG_SYS_CBSIZE];
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100530
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100531 sprintf(message,
532 "A valid Toradex config block is present, still recreate? [y/N] ");
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100533
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100534 if (!cli_readline(message))
535 goto out;
536
537 if (console_buffer[0] != 'y' &&
538 console_buffer[0] != 'Y')
539 goto out;
540 }
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100541#endif
542 }
543
544 /* Parse new Toradex config block data... */
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100545 if (argc < 3 || (force_overwrite && argc < 4)) {
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100546 err = get_cfgblock_interactive();
Dominik Sliwa587b13c2019-03-25 17:18:27 +0100547 } else {
548 if (force_overwrite)
549 err = get_cfgblock_barcode(argv[3]);
550 else
551 err = get_cfgblock_barcode(argv[2]);
552 }
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100553 if (err) {
554 ret = CMD_RET_FAILURE;
555 goto out;
556 }
557
558 /* Convert serial number to MAC address (the storage format) */
559 tdx_eth_addr.oui = htonl(0x00142dUL << 8);
560 tdx_eth_addr.nic = htonl(tdx_serial << 8);
561
562 /* Valid Tag */
563 tag = (struct toradex_tag *)config_block;
564 tag->id = TAG_VALID;
565 tag->flags = TAG_FLAG_VALID;
566 tag->len = 0;
567 offset += 4;
568
569 /* Product Tag */
570 tag = (struct toradex_tag *)(config_block + offset);
571 tag->id = TAG_HW;
572 tag->flags = TAG_FLAG_VALID;
573 tag->len = 2;
574 offset += 4;
575
576 memcpy(config_block + offset, &tdx_hw_tag, 8);
577 offset += 8;
578
579 /* MAC Tag */
580 tag = (struct toradex_tag *)(config_block + offset);
581 tag->id = TAG_MAC;
582 tag->flags = TAG_FLAG_VALID;
583 tag->len = 2;
584 offset += 4;
585
586 memcpy(config_block + offset, &tdx_eth_addr, 6);
587 offset += 6;
588 memset(config_block + offset, 0, 32 - offset);
589
590#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
591 err = tdx_cfg_block_mmc_storage(config_block, 1);
592#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
593 err = write_tdx_cfg_block_to_nand(config_block);
594#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
595 err = write_tdx_cfg_block_to_nor(config_block);
596#else
597 err = -EINVAL;
598#endif
599 if (err) {
600 printf("Failed to write Toradex config block: %d\n", ret);
601 ret = CMD_RET_FAILURE;
602 goto out;
603 }
604
605 printf("Toradex config block successfully written\n");
606
607out:
608 free(config_block);
609 return ret;
610}
611
612static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc,
613 char * const argv[])
614{
615 int ret;
616
617 if (argc < 2)
618 return CMD_RET_USAGE;
619
620 if (!strcmp(argv[1], "create")) {
621 return do_cfgblock_create(cmdtp, flag, argc, argv);
622 } else if (!strcmp(argv[1], "reload")) {
623 ret = read_tdx_cfg_block();
624 if (ret) {
625 printf("Failed to reload Toradex config block: %d\n",
626 ret);
627 return CMD_RET_FAILURE;
628 }
629 return CMD_RET_SUCCESS;
630 }
631
632 return CMD_RET_USAGE;
633}
634
Marcel Ziswiler9d364eb2019-07-12 12:35:09 +0200635U_BOOT_CMD(cfgblock, 4, 0, do_cfgblock,
636 "Toradex config block handling commands",
637 "create [-y] [barcode] - (Re-)create Toradex config block\n"
638 "cfgblock reload - Reload Toradex config block from flash"
Marcel Ziswilera2777ec2016-11-16 17:49:22 +0100639);