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Andy Yanf1a22522019-11-14 11:21:12 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4 */
5
6#ifndef __CONFIG_RK3308_COMMON_H
7#define __CONFIG_RK3308_COMMON_H
8
9#include "rockchip-common.h"
10
Tom Rini7b5f75c2022-12-04 10:04:13 -050011#define CFG_IRAM_BASE 0xfff80000
Andy Yanf1a22522019-11-14 11:21:12 +080012
Tom Riniaa6e94d2022-11-16 13:10:37 -050013#define CFG_SYS_SDRAM_BASE 0
Andy Yanf1a22522019-11-14 11:21:12 +080014#define SDRAM_MAX_SIZE 0xff000000
15#define SDRAM_BANK_SIZE (2UL << 30)
16
Andy Yanf1a22522019-11-14 11:21:12 +080017#define ENV_MEM_LAYOUT_SETTINGS \
18 "scriptaddr=0x00500000\0" \
19 "pxefile_addr_r=0x00600000\0" \
Andy Yan0abe0af2019-12-26 15:20:04 +080020 "fdt_addr_r=0x02800000\0" \
Andy Yanf1a22522019-11-14 11:21:12 +080021 "kernel_addr_r=0x00680000\0" \
22 "ramdisk_addr_r=0x04000000\0"
23
24#include <config_distro_bootcmd.h>
Tom Rini0613c362022-12-04 10:03:50 -050025#define CFG_EXTRA_ENV_SETTINGS \
Andy Yanf1a22522019-11-14 11:21:12 +080026 ENV_MEM_LAYOUT_SETTINGS \
27 "partitions=" PARTS_DEFAULT \
28 ROCKCHIP_DEVICE_SETTINGS \
29 BOOTENV
30
31#endif