Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * |
| 4 | * Common configuration settings for the SAMSUNG EXYNOS boards. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __EXYNOS_COMMON_H |
| 10 | #define __EXYNOS_COMMON_H |
| 11 | |
| 12 | /* High Level Configuration Options */ |
| 13 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ |
| 14 | #define CONFIG_S5P /* S5P Family */ |
| 15 | |
| 16 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 17 | #include <linux/sizes.h> |
| 18 | |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 19 | #define CONFIG_ARCH_CPU_INIT |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 20 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 21 | |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 22 | /* Keep L2 Cache Disabled */ |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 23 | |
| 24 | /* input clock of PLL: 24MHz input clock */ |
| 25 | #define CONFIG_SYS_CLK_FREQ 24000000 |
Andre Przywara | e4916e8 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 26 | #define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 27 | |
| 28 | #define CONFIG_SETUP_MEMORY_TAGS |
| 29 | #define CONFIG_CMDLINE_TAG |
| 30 | #define CONFIG_INITRD_TAG |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 31 | #define CONFIG_ENV_OVERWRITE |
| 32 | |
Simon Glass | 2ecd779 | 2014-10-07 22:01:52 -0600 | [diff] [blame] | 33 | /* Size of malloc() pool before and after relocation */ |
Simon Glass | 2ecd779 | 2014-10-07 22:01:52 -0600 | [diff] [blame] | 34 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 35 | |
| 36 | /* select serial console configuration */ |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 37 | |
| 38 | /* SD/MMC configuration */ |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 39 | #define CONFIG_BOUNCE_BUFFER |
| 40 | |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 41 | /* PWM */ |
| 42 | #define CONFIG_PWM |
| 43 | |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 44 | /* Miscellaneous configurable options */ |
Ian Campbell | cf3c03b | 2014-11-09 10:44:33 +0000 | [diff] [blame] | 45 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 46 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 47 | |
| 48 | /* Boot Argument Buffer Size */ |
| 49 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 50 | |
Ian Campbell | adc7d20 | 2014-11-09 10:44:31 +0000 | [diff] [blame] | 51 | #include <config_distro_defaults.h> |
| 52 | |
Simon Glass | 5ea01ab | 2014-10-07 22:01:45 -0600 | [diff] [blame] | 53 | #endif /* __CONFIG_H */ |