Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2018 NXP |
| 4 | */ |
| 5 | |
| 6 | #ifndef __IMX8M_CM_H |
| 7 | #define __IMX8M_CM_H |
| 8 | |
| 9 | #include <linux/sizes.h> |
| 10 | #include <linux/stringify.h> |
| 11 | #include <asm/arch/imx-regs.h> |
| 12 | |
| 13 | #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) |
| 14 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 15 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 16 | |
| 17 | #ifdef CONFIG_SPL_BUILD |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 18 | #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 |
| 19 | |
| 20 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ |
| 21 | #define CONFIG_MALLOC_F_ADDR 0x182000 |
| 22 | /* For RAW image gives a error info not panic */ |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 23 | |
| 24 | #endif |
| 25 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 26 | /* ENET Config */ |
| 27 | /* ENET1 */ |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 28 | |
| 29 | #ifndef CONFIG_SPL_BUILD |
| 30 | #define BOOT_TARGET_DEVICES(func) \ |
| 31 | func(MMC, mmc, 0) \ |
| 32 | func(MMC, mmc, 1) \ |
| 33 | func(DHCP, dhcp, na) |
| 34 | |
| 35 | #include <config_distro_bootcmd.h> |
| 36 | #endif |
| 37 | |
| 38 | /* Initial environment variables */ |
| 39 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 40 | BOOTENV \ |
| 41 | "scriptaddr=0x43500000\0" \ |
| 42 | "kernel_addr_r=0x40880000\0" \ |
| 43 | "image=Image\0" \ |
| 44 | "console=ttymxc0,115200\0" \ |
| 45 | "fdt_addr=0x43000000\0" \ |
| 46 | "boot_fdt=try\0" \ |
| 47 | "fdt_file=imx8mq-cm.dtb\0" \ |
| 48 | "initrd_addr=0x43800000\0" \ |
| 49 | "bootm_size=0x10000000\0" \ |
Tom Rini | de35b8f | 2021-12-11 14:55:52 -0500 | [diff] [blame] | 50 | "mmcpart=1\0" \ |
Peng Fan | adfaa42 | 2022-04-15 12:23:41 +0800 | [diff] [blame] | 51 | "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 52 | |
| 53 | /* Link Definitions */ |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 54 | |
| 55 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
| 56 | #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 57 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 58 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 60 | #define PHYS_SDRAM 0x40000000 |
| 61 | #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */ |
| 62 | |
Marek Vasut | 52b6b48 | 2022-04-24 23:44:03 +0200 | [diff] [blame] | 63 | #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 64 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 65 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 66 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 67 | |
Ilko Iliev | 7666ccc | 2021-04-23 09:45:52 +0200 | [diff] [blame] | 68 | #endif |