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Simon Glassadfb2bf2015-08-30 16:55:43 -06001#
2# Copyright (C) 2015 Google. Inc
3# Written by Simon Glass <sjg@chromium.org>
4#
5# SPDX-License-Identifier: GPL-2.0+
6#
7
8U-Boot on Rockchip
9==================
10
11There are several repositories available with versions of U-Boot that support
12many Rockchip devices [1] [2].
13
14The current mainline support is experimental only and is not useful for
15anything. It should provide a base on which to build.
16
17So far only support for the RK3288 is provided.
18
19
20Prerequisites
21=============
22
23You will need:
24
25 - Firefly RK3288 baord
26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
29 - rkflashtool [3]
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34
35
36Building
37========
38
39At present three RK3288 boards are supported:
40
41 - Firefly RK3288 - use firefly-rk3288 configuration
Simon Glass7c1058f2016-01-21 19:45:24 -070042 - Radxa Rock 2 - use rock2 configuration
Simon Glassadfb2bf2015-08-30 16:55:43 -060043 - Haier Chromebook - use chromebook_jerry configuration
44
huang lin1d5a6962015-11-17 14:20:31 +080045one RK3036 board is support:
46
47 - EVB RK3036 - use evb-rk3036_defconfig configuration
48
Simon Glassadfb2bf2015-08-30 16:55:43 -060049For example:
50
51 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
52
53(or you can use another cross compiler if you prefer)
54
Simon Glassadfb2bf2015-08-30 16:55:43 -060055
56Writing to the board with USB
57=============================
58
59For USB to work you must get your board into ROM boot mode, either by erasing
60your MMC or (perhaps) holding the recovery button when you boot the board.
61To erase your MMC, you can boot into Linux and type (as root)
62
63 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
64
65Connect your board's OTG port to your computer.
66
67To create a suitable image and write it to the board:
68
Jeffy Chen717f8842015-11-27 12:07:18 +080069 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
Simon Glassf2acc552015-08-30 16:55:52 -060070 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
Simon Glassadfb2bf2015-08-30 16:55:43 -060071 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
72
73If all goes well you should something like:
74
75 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
76 Card did not respond to voltage select!
77 spl: mmc init failed with error: -17
78 ### ERROR ### Please RESET the board ###
79
80You will need to reset the board before each time you try. Yes, that's all
81it does so far. If support for the Rockchip USB protocol or DFU were added
82in SPL then we could in principle load U-Boot and boot to a prompt from USB
83as several other platforms do. However it does not seem to be possible to
84use the existing boot ROM code from SPL.
85
86
87Booting from an SD card
88=======================
89
90To write an image that boots from an SD card (assumed to be /dev/sdc):
91
Jeffy Chen717f8842015-11-27 12:07:18 +080092 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
Simon Glassf2acc552015-08-30 16:55:52 -060093 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
94 sudo dd if=out of=/dev/sdc seek=64 && \
Simon Glassadfb2bf2015-08-30 16:55:43 -060095 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
96
97This puts the Rockchip header and SPL image first and then places the U-Boot
98image at block 256 (i.e. 128KB from the start of the SD card). This
99corresponds with this setting in U-Boot:
100
101 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
102
103Put this SD (or micro-SD) card into your board and reset it. You should see
104something like:
105
106 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
107
108
109 U-Boot 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
110
111 DRAM: 2 GiB
112 MMC:
113 Using default environment
114
115 In: serial@ff690000
116 Out: serial@ff690000
117 Err: serial@ff690000
118 =>
119
huang lin1d5a6962015-11-17 14:20:31 +0800120For evb_rk3036 board:
Jeffy Chen717f8842015-11-27 12:07:18 +0800121 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
huang lin1d5a6962015-11-17 14:20:31 +0800122 cat evb-rk3036/u-boot-dtb.bin >> out && \
123 sudo dd if=out of=/dev/sdc seek=64
124
125Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
126 debug uart must be disabled
Simon Glassadfb2bf2015-08-30 16:55:43 -0600127
128Booting from SPI
129================
130
131To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
132
Simon Glassdd8e4292015-12-29 05:22:45 -0700133 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
134 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
135 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
136 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
Simon Glassadfb2bf2015-08-30 16:55:43 -0600137 dd if=out.bin of=out.bin.pad bs=4M conv=sync
138
139This converts the SPL image to the required SPI format by adding the Rockchip
140header and skipping every 2KB block. Then the U-Boot image is written at
141offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
142The position of U-Boot is controlled with this setting in U-Boot:
143
144 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
145
146If you have a Dediprog em100pro connected then you can write the image with:
147
148 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
149
150When booting you should see something like:
151
152 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
153
154
155 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
156
157 Model: Google Jerry
158 DRAM: 2 GiB
159 MMC:
160 Using default environment
161
162 In: serial@ff690000
163 Out: serial@ff690000
164 Err: serial@ff690000
165 =>
166
167
168Future work
169===========
170
171Immediate priorities are:
172
Simon Glassadfb2bf2015-08-30 16:55:43 -0600173- GPIO (driver exists but is lightly tested)
174- I2C (driver exists but is non-functional)
175- USB host
176- USB device
177- PMIC and regulators (only ACT8846 is supported at present)
178- LCD and HDMI
179- Run CPU at full speed
180- Ethernet
181- NAND flash
182- Support for other Rockchip parts
183- Boot U-Boot proper over USB OTG (at present only SPL works)
184
185
186Development Notes
187=================
188
189There are plenty of patches in the links below to help with this work.
190
191[1] https://github.com/rkchrome/uboot.git
192[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
193[3] https://github.com/linux-rockchip/rkflashtool.git
194[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
195
196rkimage
197-------
198
199rkimage.c produces an SPL image suitable for sending directly to the boot ROM
200over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
201followed by u-boot-spl-dtb.bin.
202
203The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
204starts at 0xff700000 and extends to 0xff718000 where we put the stack.
205
206rksd
207----
208
209rksd.c produces an image consisting of 32KB of empty space, a header and
210u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
211most of the fields are unused by U-Boot. We just need to specify the
212signature, a flag and the block offset and size of the SPL image.
213
214The header occupies a single block but we pad it out to 4 blocks. The header
215is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
216image can be encoded too but we don't do that.
217
218The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
219or 0x40 blocks. This is a severe and annoying limitation. There may be a way
220around this limitation, since there is plenty of SRAM, but at present the
221board refuses to boot if this limit is exceeded.
222
223The image produced is padded up to a block boundary (512 bytes). It should be
224written to the start of an SD card using dd.
225
226Since this image is set to load U-Boot from the SD card at block offset,
227CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
228u-boot-dtb.img to the SD card at that offset. See above for instructions.
229
230rkspi
231-----
232
233rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
234resulting image is then spread out so that only the first 2KB of each 4KB
235sector is used. The header is the same as with rksd and the maximum size is
236also 32KB (before spreading). The image should be written to the start of
237SPI flash.
238
239See above for instructions on how to write a SPI image.
240
Simon Glass002c6342016-01-21 19:45:08 -0700241rkmux.py
242--------
243
244You can use this script to create #defines for SoC register access. See the
245script for usage.
246
Simon Glassadfb2bf2015-08-30 16:55:43 -0600247
248Device tree and driver model
249----------------------------
250
251Where possible driver model is used to provide a structure to the
252functionality. Device tree is used for configuration. However these have an
253overhead and in SPL with a 32KB size limit some shortcuts have been taken.
254In general all Rockchip drivers should use these features, with SPL-specific
255modifications where required.
256
257
258--
259Simon Glass <sjg@chromium.org>
26024 June 2015