blob: 968b3c47b4b0f1bb8b051c1c2a18ee6850bc79eb [file] [log] [blame]
wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Most of the following information was derived from the document
26 * "Information Technology - AT Attachment-3 Interface (ATA-3)"
27 * which can be found at:
28 * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
29 * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
30 * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
31 */
32
33#ifndef _ATA_H
34#define _ATA_H
35
36/* Register addressing depends on the hardware design; for instance,
37 * 8-bit (register) and 16-bit (data) accesses might use different
38 * address spaces. This is implemented by the following definitions.
39 */
40
41#define ATA_IO_DATA(x) (CFG_ATA_DATA_OFFSET+(x))
42#define ATA_IO_REG(x) (CFG_ATA_REG_OFFSET +(x))
43#define ATA_IO_ALT(x) (CFG_ATA_ALT_OFFSET +(x))
44
45/*
46 * I/O Register Descriptions
47 */
48#define ATA_DATA_REG ATA_IO_DATA(0)
49#define ATA_ERROR_REG ATA_IO_REG(1)
50#define ATA_SECT_CNT ATA_IO_REG(2)
51#define ATA_SECT_NUM ATA_IO_REG(3)
52#define ATA_CYL_LOW ATA_IO_REG(4)
53#define ATA_CYL_HIGH ATA_IO_REG(5)
54#define ATA_DEV_HD ATA_IO_REG(6)
55#define ATA_COMMAND ATA_IO_REG(7)
56#define ATA_STATUS ATA_COMMAND
57#define ATA_DEV_CTL ATA_IO_ALT(6)
58#define ATA_LBA_LOW ATA_SECT_NUM
59#define ATA_LBA_MID ATA_CYL_LOW
60#define ATA_LBA_HIGH ATA_CYL_HIGH
61#define ATA_LBA_SEL ATA_DEV_CTL
62
63/*
64 * Status register bits
65 */
66#define ATA_STAT_BUSY 0x80 /* Device Busy */
67#define ATA_STAT_READY 0x40 /* Device Ready */
68#define ATA_STAT_FAULT 0x20 /* Device Fault */
69#define ATA_STAT_SEEK 0x10 /* Device Seek Complete */
70#define ATA_STAT_DRQ 0x08 /* Data Request (ready) */
71#define ATA_STAT_CORR 0x04 /* Corrected Data Error */
72#define ATA_STAT_INDEX 0x02 /* Vendor specific */
73#define ATA_STAT_ERR 0x01 /* Error */
74
75/*
76 * Device / Head Register Bits
77 */
78#define ATA_DEVICE(x) ((x & 1)<<4)
79#define ATA_LBA 0xE0
80
81/*
82 * ATA Commands (only mandatory commands listed here)
83 */
84#define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */
85#define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */
86#define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/
87#define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/
88#define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */
89#define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */
90#define ATA_CMD_SEEK 0x70 /* Seek */
91#define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */
92#define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */
93#define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */
94#define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */
95#define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */
96#define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */
97#define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */
98#define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */
99#define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */
100#define ATA_CMD_IDENT 0xEC /* Identify Device */
101#define ATA_CMD_SETF 0xEF /* Set Features */
102#define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */
103
104/*
105 * ATAPI Commands
106 */
107#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
108#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */
109
110
111#define ATAPI_CMD_INQUIRY 0x12
112#define ATAPI_CMD_REQ_SENSE 0x03
113#define ATAPI_CMD_READ_CAP 0x25
114#define ATAPI_CMD_START_STOP 0x1B
115#define ATAPI_CMD_READ_12 0xA8
116
117
118#define ATA_GET_ERR() inb(ATA_STATUS)
119#define ATA_GET_STAT() inb(ATA_STATUS)
120#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
121#define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR)
122#define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT)
123#define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ)
124#define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK)
125#define ATA_DATA_READY (ATA_STAT_DRQ)
126
127#define ATA_BLOCKSIZE 512 /* bytes */
128#define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
129#define ATA_SECTORWORDS (512 / sizeof(unsigned long))
130
131#ifndef ATA_RESET_TIME
132#define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */
133#endif
134
135/* ------------------------------------------------------------------------- */
136
137/*
138 * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
139 */
140typedef struct hd_driveid {
141 unsigned short config; /* lots of obsolete bit flags */
142 unsigned short cyls; /* "physical" cyls */
143 unsigned short reserved2; /* reserved (word 2) */
144 unsigned short heads; /* "physical" heads */
145 unsigned short track_bytes; /* unformatted bytes per track */
146 unsigned short sector_bytes; /* unformatted bytes per sector */
147 unsigned short sectors; /* "physical" sectors per track */
148 unsigned short vendor0; /* vendor unique */
149 unsigned short vendor1; /* vendor unique */
150 unsigned short vendor2; /* vendor unique */
151 unsigned char serial_no[20]; /* 0 = not_specified */
152 unsigned short buf_type;
153 unsigned short buf_size; /* 512 byte increments; 0 = not_specified */
154 unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */
155 unsigned char fw_rev[8]; /* 0 = not_specified */
156 unsigned char model[40]; /* 0 = not_specified */
157 unsigned char max_multsect; /* 0=not_implemented */
158 unsigned char vendor3; /* vendor unique */
159 unsigned short dword_io; /* 0=not_implemented; 1=implemented */
160 unsigned char vendor4; /* vendor unique */
161 unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
162 unsigned short reserved50; /* reserved (word 50) */
163 unsigned char vendor5; /* vendor unique */
164 unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */
165 unsigned char vendor6; /* vendor unique */
166 unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */
167 unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */
168 unsigned short cur_cyls; /* logical cylinders */
169 unsigned short cur_heads; /* logical heads */
170 unsigned short cur_sectors; /* logical sectors per track */
171 unsigned short cur_capacity0; /* logical total sectors on drive */
172 unsigned short cur_capacity1; /* (2 words, misaligned int) */
173 unsigned char multsect; /* current multiple sector count */
174 unsigned char multsect_valid; /* when (bit0==1) multsect is ok */
175 unsigned int lba_capacity; /* total number of sectors */
176 unsigned short dma_1word; /* single-word dma info */
177 unsigned short dma_mword; /* multiple-word dma info */
178 unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */
179 unsigned short eide_dma_min; /* min mword dma cycle time (ns) */
180 unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */
181 unsigned short eide_pio; /* min cycle time (ns), no IORDY */
182 unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */
183 unsigned short words69_70[2]; /* reserved words 69-70 */
184 unsigned short words71_74[4]; /* reserved words 71-74 */
185 unsigned short queue_depth; /* */
186 unsigned short words76_79[4]; /* reserved words 76-79 */
187 unsigned short major_rev_num; /* */
188 unsigned short minor_rev_num; /* */
189 unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */
190 unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero */
191 unsigned short cfsse; /* command set-feature supported extensions */
192 unsigned short cfs_enable_1; /* command set-feature enabled */
193 unsigned short cfs_enable_2; /* command set-feature enabled */
194 unsigned short csf_default; /* command set-feature default */
195 unsigned short dma_ultra; /* */
196 unsigned short word89; /* reserved (word 89) */
197 unsigned short word90; /* reserved (word 90) */
198 unsigned short CurAPMvalues; /* current APM values */
199 unsigned short word92; /* reserved (word 92) */
200 unsigned short hw_config; /* hardware config */
201 unsigned short words94_125[32];/* reserved words 94-125 */
202 unsigned short last_lun; /* reserved (word 126) */
203 unsigned short word127; /* reserved (word 127) */
204 unsigned short dlf; /* device lock function
205 * 15:9 reserved
206 * 8 security level 1:max 0:high
207 * 7:6 reserved
208 * 5 enhanced erase
209 * 4 expire
210 * 3 frozen
211 * 2 locked
212 * 1 en/disabled
213 * 0 capability
214 */
215 unsigned short csfo; /* current set features options
216 * 15:4 reserved
217 * 3 auto reassign
218 * 2 reverting
219 * 1 read-look-ahead
220 * 0 write cache
221 */
222 unsigned short words130_155[26];/* reserved vendor words 130-155 */
223 unsigned short word156;
224 unsigned short words157_159[3];/* reserved vendor words 157-159 */
225 unsigned short words160_255[95];/* reserved words 160-255 */
226} hd_driveid_t;
227
228
229/*
230 * PIO Mode Configuration
231 *
232 * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
233 */
234
235typedef struct {
236 unsigned int t_setup; /* Setup Time in [ns] or clocks */
237 unsigned int t_length; /* Length Time in [ns] or clocks */
238 unsigned int t_hold; /* Hold Time in [ns] or clocks */
239}
240pio_config_t;
241
242#define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */
243
244/* ------------------------------------------------------------------------- */
245
246#endif /* _ATA_H */