blob: 9bb097b081362997c54437e0efb748837876811f [file] [log] [blame]
Tom Warren60179542013-04-12 11:20:51 -07001/dts-v1/;
2
3#include "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Beaver";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
Simon Glassc3691392014-09-04 16:27:35 -06009 chosen {
10 stdout-path = &uarta;
11 };
12
Tom Warren60179542013-04-12 11:20:51 -070013 aliases {
14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
17 i2c3 = "/i2c@7000c500";
18 i2c4 = "/i2c@7000c700";
Stephen Warren67748a72016-09-13 10:45:43 -060019 mmc0 = "/sdhci@78000600";
20 mmc1 = "/sdhci@78000000";
Simon Glassd2f60f92014-10-13 23:42:12 -060021 spi0 = "/spi@7000da00";
Stephen Warrene6607cf2014-05-29 15:29:40 -060022 usb0 = "/usb@7d000000";
23 usb1 = "/usb@7d008000";
Tom Warren60179542013-04-12 11:20:51 -070024 };
25
26 memory {
27 device_type = "memory";
28 reg = <0x80000000 0x7ff00000>;
29 };
30
Thierry Reding1e669b42019-04-15 11:32:37 +020031 pcie@3000 {
Thierry Redingaffe0262014-12-09 22:25:18 -070032 status = "okay";
33
34 avdd-pexa-supply = <&ldo1_reg>;
35 vdd-pexa-supply = <&ldo1_reg>;
36 avdd-pexb-supply = <&ldo1_reg>;
37 vdd-pexb-supply = <&ldo1_reg>;
38 avdd-pex-pll-supply = <&ldo1_reg>;
39 avdd-plle-supply = <&ldo1_reg>;
40 vddio-pex-ctl-supply = <&sys_3v3_reg>;
41 hvdd-pex-supply = <&sys_3v3_pexs_reg>;
42
43 pci@1,0 {
44 status = "okay";
45 nvidia,num-lanes = <2>;
46 };
47
48 pci@2,0 {
49 nvidia,num-lanes = <2>;
50 };
51
52 pci@3,0 {
53 status = "okay";
54 nvidia,num-lanes = <2>;
55 };
56 };
57
Tom Warren60179542013-04-12 11:20:51 -070058 i2c@7000c000 {
59 status = "okay";
60 clock-frequency = <100000>;
61 };
62
63 i2c@7000c400 {
64 status = "okay";
65 clock-frequency = <100000>;
66 };
67
68 i2c@7000c500 {
69 status = "okay";
70 clock-frequency = <100000>;
71 };
72
73 i2c@7000c700 {
74 status = "okay";
75 clock-frequency = <100000>;
76 };
77
78 i2c@7000d000 {
79 status = "okay";
80 clock-frequency = <100000>;
Thierry Redingaffe0262014-12-09 22:25:18 -070081
82 pmic: tps65911@2d {
83 compatible = "ti,tps65911";
84 reg = <0x2d>;
85
86 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
87 #interrupt-cells = <2>;
88 interrupt-controller;
89
90 ti,system-power-controller;
91
92 #gpio-cells = <2>;
93 gpio-controller;
94
95 vcc1-supply = <&vdd_5v_in_reg>;
96 vcc2-supply = <&vdd_5v_in_reg>;
97 vcc3-supply = <&vio_reg>;
98 vcc4-supply = <&vdd_5v_in_reg>;
99 vcc5-supply = <&vdd_5v_in_reg>;
100 vcc6-supply = <&vdd2_reg>;
101 vcc7-supply = <&vdd_5v_in_reg>;
102 vccio-supply = <&vdd_5v_in_reg>;
103
104 regulators {
Thierry Redingaffe0262014-12-09 22:25:18 -0700105 vdd1_reg: vdd1 {
106 regulator-name = "vddio_ddr_1v2";
107 regulator-min-microvolt = <1200000>;
108 regulator-max-microvolt = <1200000>;
109 regulator-always-on;
110 };
111
112 vdd2_reg: vdd2 {
113 regulator-name = "vdd_1v5_gen";
114 regulator-min-microvolt = <1500000>;
115 regulator-max-microvolt = <1500000>;
116 regulator-always-on;
117 };
118
119 vddctrl_reg: vddctrl {
120 regulator-name = "vdd_cpu,vdd_sys";
121 regulator-min-microvolt = <1000000>;
122 regulator-max-microvolt = <1000000>;
123 regulator-always-on;
124 };
125
126 vio_reg: vio {
127 regulator-name = "vdd_1v8_gen";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <1800000>;
130 regulator-always-on;
131 };
132
133 ldo1_reg: ldo1 {
134 regulator-name = "vdd_pexa,vdd_pexb";
135 regulator-min-microvolt = <1050000>;
136 regulator-max-microvolt = <1050000>;
137 };
138
139 ldo2_reg: ldo2 {
140 regulator-name = "vdd_sata,avdd_plle";
141 regulator-min-microvolt = <1050000>;
142 regulator-max-microvolt = <1050000>;
143 };
144
145 /* LDO3 is not connected to anything */
146
147 ldo4_reg: ldo4 {
148 regulator-name = "vdd_rtc";
149 regulator-min-microvolt = <1200000>;
150 regulator-max-microvolt = <1200000>;
151 regulator-always-on;
152 };
153
154 ldo5_reg: ldo5 {
155 regulator-name = "vddio_sdmmc,avdd_vdac";
156 regulator-min-microvolt = <3300000>;
157 regulator-max-microvolt = <3300000>;
158 regulator-always-on;
159 };
160
161 ldo6_reg: ldo6 {
162 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
163 regulator-min-microvolt = <1200000>;
164 regulator-max-microvolt = <1200000>;
165 };
166
167 ldo7_reg: ldo7 {
168 regulator-name = "vdd_pllm,x,u,a_p_c_s";
169 regulator-min-microvolt = <1200000>;
170 regulator-max-microvolt = <1200000>;
171 regulator-always-on;
172 };
173
174 ldo8_reg: ldo8 {
175 regulator-name = "vdd_ddr_hs";
176 regulator-min-microvolt = <1000000>;
177 regulator-max-microvolt = <1000000>;
178 regulator-always-on;
179 };
180 };
181 };
Tom Warren60179542013-04-12 11:20:51 -0700182 };
183
184 spi@7000da00 {
185 status = "okay";
186 spi-max-frequency = <25000000>;
187 spi-flash@1 {
188 compatible = "winbond,w25q32";
189 reg = <1>;
190 spi-max-frequency = <20000000>;
191 };
192 };
193
194 sdhci@78000000 {
195 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700196 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
197 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
198 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Tom Warren60179542013-04-12 11:20:51 -0700199 bus-width = <4>;
200 };
201
202 sdhci@78000600 {
203 status = "okay";
204 bus-width = <8>;
Tom Warren9a06a1a2016-09-13 10:45:42 -0600205 non-removable;
Tom Warren60179542013-04-12 11:20:51 -0700206 };
Jim Lin56867d82013-06-21 19:05:46 +0800207
Stephen Warrene6607cf2014-05-29 15:29:40 -0600208 usb@7d000000 {
209 status = "okay";
210 dr_mode = "otg";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700211 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
Stephen Warrene6607cf2014-05-29 15:29:40 -0600212 };
213
Jim Lin56867d82013-06-21 19:05:46 +0800214 usb@7d008000 {
Simon Glass2b2b50b2015-01-05 20:05:41 -0700215 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
Jim Lin56867d82013-06-21 19:05:46 +0800216 status = "okay";
217 };
Thierry Redingaffe0262014-12-09 22:25:18 -0700218
Stephen Warrence2f2d22016-09-13 10:45:51 -0600219 clocks {
220 compatible = "simple-bus";
221 #address-cells = <1>;
222 #size-cells = <0>;
223
224 clk32k_in: clock@0 {
225 compatible = "fixed-clock";
226 reg=<0>;
227 #clock-cells = <0>;
228 clock-frequency = <32768>;
229 };
230 };
231
Thierry Redingaffe0262014-12-09 22:25:18 -0700232 regulators {
233 compatible = "simple-bus";
234 #address-cells = <1>;
235 #size-cells = <0>;
236
237 vdd_5v_in_reg: regulator@0 {
238 compatible = "regulator-fixed";
239 reg = <0>;
240 regulator-name = "vdd_5v_in";
241 regulator-min-microvolt = <5000000>;
242 regulator-max-microvolt = <5000000>;
243 regulator-always-on;
244 };
245
246 chargepump_5v_reg: regulator@1 {
247 compatible = "regulator-fixed";
248 reg = <1>;
249 regulator-name = "chargepump_5v";
250 regulator-min-microvolt = <5000000>;
251 regulator-max-microvolt = <5000000>;
252 regulator-boot-on;
253 regulator-always-on;
254 enable-active-high;
255 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
256 };
257
258 ddr_reg: regulator@2 {
259 compatible = "regulator-fixed";
260 reg = <2>;
261 regulator-name = "vdd_ddr";
262 regulator-min-microvolt = <1500000>;
263 regulator-max-microvolt = <1500000>;
264 regulator-always-on;
265 regulator-boot-on;
266 enable-active-high;
267 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
268 vin-supply = <&vdd_5v_in_reg>;
269 };
270
271 vdd_5v_sata_reg: regulator@3 {
272 compatible = "regulator-fixed";
273 reg = <3>;
274 regulator-name = "vdd_5v_sata";
275 regulator-min-microvolt = <5000000>;
276 regulator-max-microvolt = <5000000>;
277 regulator-always-on;
278 regulator-boot-on;
279 enable-active-high;
280 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
281 vin-supply = <&vdd_5v_in_reg>;
282 };
283
284 usb1_vbus_reg: regulator@4 {
285 compatible = "regulator-fixed";
286 reg = <4>;
287 regulator-name = "usb1_vbus";
288 regulator-min-microvolt = <5000000>;
289 regulator-max-microvolt = <5000000>;
290 enable-active-high;
291 gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
292 gpio-open-drain;
293 vin-supply = <&vdd_5v_in_reg>;
294 };
295
296 usb3_vbus_reg: regulator@5 {
297 compatible = "regulator-fixed";
298 reg = <5>;
299 regulator-name = "usb3_vbus";
300 regulator-min-microvolt = <5000000>;
301 regulator-max-microvolt = <5000000>;
302 enable-active-high;
303 gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
304 gpio-open-drain;
305 vin-supply = <&vdd_5v_in_reg>;
306 };
307
308 sys_3v3_reg: regulator@6 {
309 compatible = "regulator-fixed";
310 reg = <6>;
311 regulator-name = "sys_3v3,vdd_3v3_alw";
312 regulator-min-microvolt = <3300000>;
313 regulator-max-microvolt = <3300000>;
314 regulator-always-on;
315 regulator-boot-on;
316 enable-active-high;
317 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
318 vin-supply = <&vdd_5v_in_reg>;
319 };
320
321 sys_3v3_pexs_reg: regulator@7 {
322 compatible = "regulator-fixed";
323 reg = <7>;
324 regulator-name = "sys_3v3_pexs";
325 regulator-min-microvolt = <3300000>;
326 regulator-max-microvolt = <3300000>;
327 regulator-always-on;
328 regulator-boot-on;
329 enable-active-high;
330 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
331 vin-supply = <&sys_3v3_reg>;
332 };
333
334 vdd_5v0_hdmi: regulator@8 {
335 compatible = "regulator-fixed";
336 reg = <8>;
337 regulator-name = "+VDD_5V_HDMI";
338 regulator-min-microvolt = <5000000>;
339 regulator-max-microvolt = <5000000>;
340 regulator-always-on;
341 regulator-boot-on;
342 vin-supply = <&sys_3v3_reg>;
343 };
344 };
Tom Warren60179542013-04-12 11:20:51 -0700345};
Simon Glassf53dcc02017-06-12 06:22:01 -0600346
347&uarta {
348 status = "okay";
349};