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TsiChungLiew4a442d32007-08-16 19:23:50 -05001/*
2 *
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
31
32#include <asm/immap.h>
33
34DECLARE_GLOBAL_DATA_PTR;
35
36int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
37{
38 volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
39
40 ccm->rcr = CCM_RCR_SOFTRST;
41 /* we don't return! */
42 return 0;
43};
44
45int checkcpu(void)
46{
47 volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
48 u16 msk;
49 u16 id = 0;
50 u8 ver;
51
52 puts("CPU: ");
53 msk = (ccm->cir >> 6);
54 ver = (ccm->cir & 0x003f);
55 switch (msk) {
56 case 0x31:
57 id = 5235;
58 break;
59 }
60
61 if (id) {
62 printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
63 ver);
64 printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
65 (int)(gd->cpu_clk / 1000000),
66 (int)(gd->bus_clk / 1000000));
67 }
68
69 return 0;
70};
71
72#if defined(CONFIG_WATCHDOG)
73/* Called by macro WATCHDOG_RESET */
74void watchdog_reset(void)
75{
76 volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
77
78 wdp->sr = 0x5555; /* Count register */
79 asm("nop");
80 wdp->sr = 0xAAAA; /* Count register */
81}
82
83int watchdog_disable(void)
84{
85 volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
86
87 /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
88 wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
89
90 puts("WATCHDOG:disabled\n");
91 return (0);
92}
93
94int watchdog_init(void)
95{
96 volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
97 u32 wdog_module = 0;
98
99 /* set timeout and enable watchdog */
100 wdog_module = ((CFG_CLK / CFG_HZ) * CONFIG_WATCHDOG_TIMEOUT);
101 wdog_module |= (wdog_module / 8192);
102 wdp->mr = wdog_module;
103
104 wdp->cr = WTM_WCR_EN;
105 puts("WATCHDOG:enabled\n");
106
107 return (0);
108}
109#endif /* CONFIG_WATCHDOG */