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wdenk6f213472003-08-29 22:00:43 +00001/*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
wdenka56bd922004-06-06 23:13:55 +00006 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
wdenk6f213472003-08-29 22:00:43 +00007 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33
wdenk6f213472003-08-29 22:00:43 +000034#include <config.h>
35#include <version.h>
36
37#if defined(CONFIG_OMAP1610)
38#include <./configs/omap1510.h>
wdenka56bd922004-06-06 23:13:55 +000039#elif defined(CONFIG_OMAP730)
40#include <./configs/omap730.h>
wdenk6f213472003-08-29 22:00:43 +000041#endif
42
43/*
44 *************************************************************************
45 *
46 * Jump vector table as in table 3.1 in [1]
47 *
48 *************************************************************************
49 */
50
51
52.globl _start
53_start:
54 b reset
55 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort
58 ldr pc, _data_abort
59 ldr pc, _not_used
60 ldr pc, _irq
61 ldr pc, _fiq
62
63_undefined_instruction:
64 .word undefined_instruction
65_software_interrupt:
66 .word software_interrupt
67_prefetch_abort:
68 .word prefetch_abort
69_data_abort:
70 .word data_abort
71_not_used:
72 .word not_used
73_irq:
74 .word irq
75_fiq:
76 .word fiq
77
78 .balignl 16,0xdeadbeef
79
80
81/*
82 *************************************************************************
83 *
84 * Startup Code (reset vector)
85 *
86 * do important init only if we don't start from memory!
87 * setup Memory and board specific bits prior to relocation.
88 * relocate armboot to ram
89 * setup stack
90 *
91 *************************************************************************
92 */
93
wdenk6f213472003-08-29 22:00:43 +000094_TEXT_BASE:
95 .word TEXT_BASE
96
97.globl _armboot_start
98_armboot_start:
99 .word _start
100
101/*
wdenkf6e20fc2004-02-08 19:38:38 +0000102 * These are defined in the board-specific linker script.
wdenk6f213472003-08-29 22:00:43 +0000103 */
wdenkf6e20fc2004-02-08 19:38:38 +0000104.globl _bss_start
105_bss_start:
106 .word __bss_start
107
108.globl _bss_end
109_bss_end:
110 .word _end
wdenk6f213472003-08-29 22:00:43 +0000111
wdenk6f213472003-08-29 22:00:43 +0000112#ifdef CONFIG_USE_IRQ
113/* IRQ stack memory (calculated at run-time) */
114.globl IRQ_STACK_START
115IRQ_STACK_START:
116 .word 0x0badc0de
117
118/* IRQ stack memory (calculated at run-time) */
119.globl FIQ_STACK_START
120FIQ_STACK_START:
121 .word 0x0badc0de
122#endif
123
124
125/*
126 * the actual reset code
127 */
128
129reset:
130 /*
131 * set the cpu to SVC32 mode
132 */
133 mrs r0,cpsr
134 bic r0,r0,#0x1f
135 orr r0,r0,#0xd3
136 msr cpsr,r0
137
wdenk6f213472003-08-29 22:00:43 +0000138 /*
wdenka8c7c702003-12-06 19:49:23 +0000139 * we do sys-critical inits only at reboot,
140 * not when booting from ram!
wdenk6f213472003-08-29 22:00:43 +0000141 */
wdenk8aa1a2d2005-04-04 12:44:11 +0000142#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenka8c7c702003-12-06 19:49:23 +0000143 bl cpu_init_crit
144#endif
145
wdenk8aa1a2d2005-04-04 12:44:11 +0000146#ifndef CONFIG_SKIP_RELOCATE_UBOOT
wdenka8c7c702003-12-06 19:49:23 +0000147relocate: /* relocate U-Boot to RAM */
148 adr r0, _start /* r0 <- current position of code */
149 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
150 cmp r0, r1 /* don't reloc during debug */
151 beq stack_setup
152
wdenk6f213472003-08-29 22:00:43 +0000153 ldr r2, _armboot_start
wdenkf6e20fc2004-02-08 19:38:38 +0000154 ldr r3, _bss_start
wdenka8c7c702003-12-06 19:49:23 +0000155 sub r2, r3, r2 /* r2 <- size of armboot */
156 add r2, r0, r2 /* r2 <- source end address */
wdenk6f213472003-08-29 22:00:43 +0000157
wdenk6f213472003-08-29 22:00:43 +0000158copy_loop:
wdenka8c7c702003-12-06 19:49:23 +0000159 ldmia r0!, {r3-r10} /* copy from source address [r0] */
160 stmia r1!, {r3-r10} /* copy to target address [r1] */
161 cmp r0, r2 /* until source end addreee [r2] */
wdenk6f213472003-08-29 22:00:43 +0000162 ble copy_loop
wdenk8aa1a2d2005-04-04 12:44:11 +0000163#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
wdenk6f213472003-08-29 22:00:43 +0000164
wdenka8c7c702003-12-06 19:49:23 +0000165 /* Set up the stack */
166stack_setup:
167 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
168 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
169 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
170#ifdef CONFIG_USE_IRQ
171 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
172#endif
173 sub sp, r0, #12 /* leave 3 words for abort-stack */
wdenk6f213472003-08-29 22:00:43 +0000174
wdenkf6e20fc2004-02-08 19:38:38 +0000175clear_bss:
176 ldr r0, _bss_start /* find start of bss segment */
wdenkf6e20fc2004-02-08 19:38:38 +0000177 ldr r1, _bss_end /* stop here */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200178 mov r2, #0x00000000 /* clear */
wdenkf6e20fc2004-02-08 19:38:38 +0000179
180clbss_l:str r2, [r0] /* clear loop... */
181 add r0, r0, #4
182 cmp r0, r1
wdenka1191902005-01-09 17:12:27 +0000183 ble clbss_l
wdenkf6e20fc2004-02-08 19:38:38 +0000184
Stelian Popfefb6c12008-01-30 21:15:54 +0000185 bl coloured_LED_init
186 bl red_LED_on
187
wdenk6f213472003-08-29 22:00:43 +0000188 ldr pc, _start_armboot
189
190_start_armboot:
191 .word start_armboot
192
193
194/*
195 *************************************************************************
196 *
197 * CPU_init_critical registers
198 *
199 * setup important registers
200 * setup memory timing
201 *
202 *************************************************************************
203 */
Stelian Popa6cdd212008-01-19 21:09:35 +0000204#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenk6f213472003-08-29 22:00:43 +0000205cpu_init_crit:
206 /*
207 * flush v4 I/D caches
208 */
209 mov r0, #0
210 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
211 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
212
213 /*
214 * disable MMU stuff and caches
215 */
216 mrc p15, 0, r0, c1, c0, 0
217 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
218 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
219 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
220 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
221 mcr p15, 0, r0, c1, c0, 0
222
223 /*
224 * Go setup Memory and board specific bits prior to relocation.
225 */
226 mov ip, lr /* perserve link reg across call */
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200227 bl lowlevel_init /* go setup pll,mux,memory */
wdenk6f213472003-08-29 22:00:43 +0000228 mov lr, ip /* restore link */
229 mov pc, lr /* back to my caller */
Stelian Popa6cdd212008-01-19 21:09:35 +0000230#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
231
wdenk6f213472003-08-29 22:00:43 +0000232/*
233 *************************************************************************
234 *
235 * Interrupt handling
236 *
237 *************************************************************************
238 */
239
240@
241@ IRQ stack frame.
242@
243#define S_FRAME_SIZE 72
244
245#define S_OLD_R0 68
246#define S_PSR 64
247#define S_PC 60
248#define S_LR 56
249#define S_SP 52
250
251#define S_IP 48
252#define S_FP 44
253#define S_R10 40
254#define S_R9 36
255#define S_R8 32
256#define S_R7 28
257#define S_R6 24
258#define S_R5 20
259#define S_R4 16
260#define S_R3 12
261#define S_R2 8
262#define S_R1 4
263#define S_R0 0
264
265#define MODE_SVC 0x13
266#define I_BIT 0x80
267
268/*
269 * use bad_save_user_regs for abort/prefetch/undef/swi ...
270 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
271 */
272
273 .macro bad_save_user_regs
274 @ carve out a frame on current user stack
275 sub sp, sp, #S_FRAME_SIZE
276 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
wdenkf6e20fc2004-02-08 19:38:38 +0000277
278 ldr r2, _armboot_start
279 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
280 sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
wdenk6f213472003-08-29 22:00:43 +0000281 @ get values for "aborted" pc and cpsr (into parm regs)
282 ldmia r2, {r2 - r3}
283 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
284 add r5, sp, #S_SP
285 mov r1, lr
286 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
287 mov r0, sp @ save current stack into r0 (param register)
288 .endm
289
290 .macro irq_save_user_regs
291 sub sp, sp, #S_FRAME_SIZE
292 stmia sp, {r0 - r12} @ Calling r0-r12
293 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
294 add r8, sp, #S_PC
295 stmdb r8, {sp, lr}^ @ Calling SP, LR
296 str lr, [r8, #0] @ Save calling PC
297 mrs r6, spsr
298 str r6, [r8, #4] @ Save CPSR
299 str r0, [r8, #8] @ Save OLD_R0
300 mov r0, sp
301 .endm
302
303 .macro irq_restore_user_regs
304 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
305 mov r0, r0
306 ldr lr, [sp, #S_PC] @ Get PC
307 add sp, sp, #S_FRAME_SIZE
308 subs pc, lr, #4 @ return & move spsr_svc into cpsr
309 .endm
310
311 .macro get_bad_stack
wdenkf6e20fc2004-02-08 19:38:38 +0000312 ldr r13, _armboot_start @ setup our mode stack
313 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
314 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
wdenk6f213472003-08-29 22:00:43 +0000315
316 str lr, [r13] @ save caller lr in position 0 of saved stack
317 mrs lr, spsr @ get the spsr
318 str lr, [r13, #4] @ save spsr in position 1 of saved stack
319 mov r13, #MODE_SVC @ prepare SVC-Mode
320 @ msr spsr_c, r13
321 msr spsr, r13 @ switch modes, make sure moves will execute
322 mov lr, pc @ capture return pc
323 movs pc, lr @ jump to next instruction & switch modes.
324 .endm
325
326 .macro get_irq_stack @ setup IRQ stack
327 ldr sp, IRQ_STACK_START
328 .endm
329
330 .macro get_fiq_stack @ setup FIQ stack
331 ldr sp, FIQ_STACK_START
332 .endm
333
334/*
335 * exception handlers
336 */
337 .align 5
338undefined_instruction:
339 get_bad_stack
340 bad_save_user_regs
341 bl do_undefined_instruction
342
343 .align 5
344software_interrupt:
345 get_bad_stack
346 bad_save_user_regs
347 bl do_software_interrupt
348
349 .align 5
350prefetch_abort:
351 get_bad_stack
352 bad_save_user_regs
353 bl do_prefetch_abort
354
355 .align 5
356data_abort:
357 get_bad_stack
358 bad_save_user_regs
359 bl do_data_abort
360
361 .align 5
362not_used:
363 get_bad_stack
364 bad_save_user_regs
365 bl do_not_used
366
367#ifdef CONFIG_USE_IRQ
368
369 .align 5
370irq:
371 get_irq_stack
372 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200373 bl do_irq
wdenk6f213472003-08-29 22:00:43 +0000374 irq_restore_user_regs
375
376 .align 5
377fiq:
378 get_fiq_stack
379 /* someone ought to write a more effiction fiq_save_user_regs */
380 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200381 bl do_fiq
wdenk6f213472003-08-29 22:00:43 +0000382 irq_restore_user_regs
383
384#else
385
386 .align 5
387irq:
388 get_bad_stack
389 bad_save_user_regs
390 bl do_irq
391
392 .align 5
393fiq:
394 get_bad_stack
395 bad_save_user_regs
396 bl do_fiq
397
398#endif