blob: 4ac5a21524c5cefb814e21101d2cef2937588278 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Michal Simek9d242742014-01-21 07:30:37 +01002/*
3 * (C) Copyright 2013 - 2014 Xilinx, Inc
4 *
5 * Michal Simek <michal.simek@xilinx.com>
Michal Simek9d242742014-01-21 07:30:37 +01006 */
7
8#include <asm-offsets.h>
9
10OUTPUT_ARCH(microblaze)
11ENTRY(_start)
12
13SECTIONS
14{
15 .text ALIGN(0x4):
16 {
17 __text_start = .;
18 arch/microblaze/cpu/start.o (.text)
19 *(.text)
20 *(.text.*)
21 __text_end = .;
22 }
23
24 .rodata ALIGN(0x4):
25 {
26 __rodata_start = .;
27 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
28 __rodata_end = .;
29 }
30
31 .data ALIGN(0x4):
32 {
33 __data_start = .;
34 *(.data)
35 *(.data.*)
36 __data_end = .;
37 }
38
Michal Simek7f338992015-02-03 15:09:52 +010039 . = ALIGN(4);
Andrew Scull99e2fbc2022-05-30 10:00:04 +000040 __u_boot_list : {
41 KEEP(*(SORT(__u_boot_list*)));
Michal Simek7f338992015-02-03 15:09:52 +010042 }
43 __init_end = . ;
44
Michal Simek9d242742014-01-21 07:30:37 +010045 .bss ALIGN(0x4):
46 {
47 __bss_start = .;
48 *(.sbss)
49 *(.scommon)
50 *(.bss)
51 *(.bss.*)
52 *(COMMON)
53 . = ALIGN(4);
54 __bss_end = .;
55 }
Ovidiu Panaitedf0f9b2021-11-30 18:33:49 +020056 _end = . ;
Michal Simek9d242742014-01-21 07:30:37 +010057}
58
59#if defined(CONFIG_SPL_MAX_FOOTPRINT)
Ovidiu Panaitedf0f9b2021-11-30 18:33:49 +020060ASSERT(_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \
Michal Simek9d242742014-01-21 07:30:37 +010061 "SPL image plus BSS too big");
62#endif