blob: b95fcfa421c071cfdafb724443c4cd574a677d85 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Guinotd5cc3f52013-06-18 15:14:49 +02002/*
3 * cpld-gpio-bus.c: provides support for the CPLD GPIO bus found on some LaCie
4 * boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO
5 * bus exposes two registers (address and data). Each of this register is made
6 * up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that
7 * the registers have been updated.
8 *
9 * Mostly this bus is used to configure the LEDs on LaCie boards.
10 *
11 * Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
Simon Guinotd5cc3f52013-06-18 15:14:49 +020012 */
13
14#include <asm/arch/gpio.h>
15#include "cpld-gpio-bus.h"
16
17static void cpld_gpio_bus_set_addr(struct cpld_gpio_bus *bus, unsigned addr)
18{
19 int pin;
20
21 for (pin = 0; pin < bus->num_addr; pin++)
22 kw_gpio_set_value(bus->addr[pin], (addr >> pin) & 1);
23}
24
25static void cpld_gpio_bus_set_data(struct cpld_gpio_bus *bus, unsigned data)
26{
27 int pin;
28
29 for (pin = 0; pin < bus->num_data; pin++)
30 kw_gpio_set_value(bus->data[pin], (data >> pin) & 1);
31}
32
33static void cpld_gpio_bus_enable_select(struct cpld_gpio_bus *bus)
34{
35 /* The transfer is enabled on the raising edge. */
36 kw_gpio_set_value(bus->enable, 0);
37 kw_gpio_set_value(bus->enable, 1);
38}
39
40void cpld_gpio_bus_write(struct cpld_gpio_bus *bus,
41 unsigned addr, unsigned value)
42{
43 cpld_gpio_bus_set_addr(bus, addr);
44 cpld_gpio_bus_set_data(bus, value);
45 cpld_gpio_bus_enable_select(bus);
46}