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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
maxims@google.com4697abe2017-01-18 13:44:55 -08002/*
3 * Copyright 2016 Google Inc.
maxims@google.com4697abe2017-01-18 13:44:55 -08004 */
5
6#include <common.h>
7#include <dm.h>
8#include <errno.h>
9#include <timer.h>
10#include <asm/io.h>
11#include <asm/arch/timer.h>
Simon Glass61b29b82020-02-03 07:36:15 -070012#include <linux/err.h>
maxims@google.com4697abe2017-01-18 13:44:55 -080013
maxims@google.com4697abe2017-01-18 13:44:55 -080014#define AST_TICK_TIMER 1
15#define AST_TMC_RELOAD_VAL 0xffffffff
16
17struct ast_timer_priv {
18 struct ast_timer *regs;
19 struct ast_timer_counter *tmc;
20};
21
22static struct ast_timer_counter *ast_get_timer_counter(struct ast_timer *timer,
23 int n)
24{
25 if (n > 3)
26 return &timer->timers2[n - 4];
27 else
28 return &timer->timers1[n - 1];
29}
30
31static int ast_timer_probe(struct udevice *dev)
32{
33 struct ast_timer_priv *priv = dev_get_priv(dev);
34 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
35
36 writel(AST_TMC_RELOAD_VAL, &priv->tmc->reload_val);
37
38 /*
39 * Stop the timer. This will also load reload_val into
40 * the status register.
41 */
42 clrbits_le32(&priv->regs->ctrl1,
43 AST_TMC_EN << AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER));
44 /* Start the timer from the fixed 1MHz clock. */
45 setbits_le32(&priv->regs->ctrl1,
46 (AST_TMC_EN | AST_TMC_1MHZ) <<
47 AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER));
48
49 uc_priv->clock_rate = AST_TMC_RATE;
50
51 return 0;
52}
53
Sean Anderson8af7bb92020-10-07 14:37:44 -040054static u64 ast_timer_get_count(struct udevice *dev)
maxims@google.com4697abe2017-01-18 13:44:55 -080055{
56 struct ast_timer_priv *priv = dev_get_priv(dev);
57
Sean Anderson8af7bb92020-10-07 14:37:44 -040058 return AST_TMC_RELOAD_VAL - readl(&priv->tmc->status);
maxims@google.com4697abe2017-01-18 13:44:55 -080059}
60
Simon Glassd1998a92020-12-03 16:55:21 -070061static int ast_timer_of_to_plat(struct udevice *dev)
maxims@google.com4697abe2017-01-18 13:44:55 -080062{
63 struct ast_timer_priv *priv = dev_get_priv(dev);
64
Masahiro Yamada702e57e2020-08-04 14:14:43 +090065 priv->regs = dev_read_addr_ptr(dev);
Ovidiu Panait3fe69d32020-08-03 22:17:35 +030066 if (!priv->regs)
67 return -EINVAL;
maxims@google.com4697abe2017-01-18 13:44:55 -080068
69 priv->tmc = ast_get_timer_counter(priv->regs, AST_TICK_TIMER);
70
71 return 0;
72}
73
74static const struct timer_ops ast_timer_ops = {
75 .get_count = ast_timer_get_count,
76};
77
78static const struct udevice_id ast_timer_ids[] = {
79 { .compatible = "aspeed,ast2500-timer" },
80 { .compatible = "aspeed,ast2400-timer" },
81 { }
82};
83
84U_BOOT_DRIVER(ast_timer) = {
85 .name = "ast_timer",
86 .id = UCLASS_TIMER,
87 .of_match = ast_timer_ids,
88 .probe = ast_timer_probe,
Simon Glass41575d82020-12-03 16:55:17 -070089 .priv_auto = sizeof(struct ast_timer_priv),
Simon Glassd1998a92020-12-03 16:55:21 -070090 .of_to_plat = ast_timer_of_to_plat,
maxims@google.com4697abe2017-01-18 13:44:55 -080091 .ops = &ast_timer_ops,
maxims@google.com4697abe2017-01-18 13:44:55 -080092};