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wdenkc6097192002-11-03 00:24:07 +00001/*
wdenkc837dcb2004-01-20 23:12:12 +00002 * (C) Copyright 2000-2004
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * David Updegraff, Cray, Inc. dave@cray.com: our 405 is walnut-lite..
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31#define CONFIG_CRAYL1
32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
36
37#define CONFIG_405GP 1 /* This is a PPC405 CPU */
38#define CONFIG_4xx 1 /* ...member of PPC405 family */
Wolfgang Denk2ae18242010-10-06 09:05:45 +020039
40/*
41 * Note: I make an "image" from U-Boot itself, which prefixes 0x40
42 * bytes of header info, hence start address is thus shifted.
43 */
44#define CONFIG_SYS_TEXT_BASE 0xFFFD0040
45
wdenkc6097192002-11-03 00:24:07 +000046#define CONFIG_SYS_CLK_FREQ 25000000
47#define CONFIG_BAUDRATE 9600
48#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
Ben Warren96e21f82008-10-27 23:50:15 -070049
50#define CONFIG_PPC4xx_EMAC
wdenkc6097192002-11-03 00:24:07 +000051#define CONFIG_MII 1 /* MII PHY management */
52#define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */
wdenkc837dcb2004-01-20 23:12:12 +000053#define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */
wdenkc6097192002-11-03 00:24:07 +000054#define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */
55
Stefan Roese550650d2010-09-20 16:05:31 +020056#define CONFIG_CONS_INDEX 1 /* Use UART0 */
57#define CONFIG_SYS_NS16550
58#define CONFIG_SYS_NS16550_SERIAL
59#define CONFIG_SYS_NS16550_REG_SIZE 1
60#define CONFIG_SYS_NS16550_CLK get_serial_clock()
61
wdenkc6097192002-11-03 00:24:07 +000062/* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
63 * keep possible initrd ramdisk decompression out. This is in k (1024 bytes)
wdenk8bde7f72003-06-27 21:31:46 +000064 #define CONFIG_PRAM 16
wdenkc6097192002-11-03 00:24:07 +000065 */
wdenk7f70e852003-05-20 14:25:27 +000066#define CONFIG_LOADADDR 0x100000 /* where TFTP images go */
wdenkc6097192002-11-03 00:24:07 +000067#undef CONFIG_BOOTARGS
68
wdenk7f70e852003-05-20 14:25:27 +000069/* Bootcmd is overridden by the bootscript in board/cray/L1
wdenkc6097192002-11-03 00:24:07 +000070 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_AUTOLOAD "no"
wdenk7f70e852003-05-20 14:25:27 +000072#define CONFIG_BOOTCOMMAND "dhcp"
wdenkc6097192002-11-03 00:24:07 +000073
wdenk8bde7f72003-06-27 21:31:46 +000074/*
wdenkc6097192002-11-03 00:24:07 +000075 * ..during experiments..
76 #define CONFIG_SERVERIP 10.0.0.1
wdenk8bde7f72003-06-27 21:31:46 +000077 #define CONFIG_ETHADDR 00:40:a6:80:14:5
wdenkc6097192002-11-03 00:24:07 +000078 */
79#define CONFIG_HARD_I2C 1 /* hardware support for i2c */
Stefan Roesed0b0dca2010-04-01 14:37:24 +020080#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
wdenk7f70e852003-05-20 14:25:27 +000081#define CONFIG_SDRAM_BANK0 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
83#define CONFIG_SYS_I2C_SLAVE 0x7F
84#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
85#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
wdenkc6097192002-11-03 00:24:07 +000086#define CONFIG_IDENT_STRING "Cray L1"
87#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
89#define CONFIG_SYS_HUSH_PARSER 1
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020090#define CONFIG_SOURCE 1
wdenkc6097192002-11-03 00:24:07 +000091
92
Jon Loeliger49cf7e82007-07-05 19:52:35 -050093/*
94 * Command line configuration.
95 */
96
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020097#define CONFIG_CMD_ASKENV
Jon Loeliger49cf7e82007-07-05 19:52:35 -050098#define CONFIG_CMD_BDI
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020099#define CONFIG_CMD_CONSOLE
100#define CONFIG_CMD_DATE
101#define CONFIG_CMD_DHCP
102#define CONFIG_CMD_DIAG
103#define CONFIG_CMD_ECHO
104#define CONFIG_CMD_EEPROM
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500105#define CONFIG_CMD_FLASH
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200106#define CONFIG_CMD_I2C
107#define CONFIG_CMD_IMI
108#define CONFIG_CMD_IMMAP
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500109#define CONFIG_CMD_MEMORY
110#define CONFIG_CMD_NET
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500111#define CONFIG_CMD_REGINFO
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500112#define CONFIG_CMD_RUN
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200113#define CONFIG_CMD_SAVEENV
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500114#define CONFIG_CMD_SETGETDCR
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200115#define CONFIG_CMD_SOURCE
Jon Loeliger49cf7e82007-07-05 19:52:35 -0500116
wdenkc6097192002-11-03 00:24:07 +0000117
118/*
Jon Loeliger5d2ebe12007-07-09 21:16:53 -0500119 * BOOTP options
wdenkc6097192002-11-03 00:24:07 +0000120 */
Jon Loeliger5d2ebe12007-07-09 21:16:53 -0500121#define CONFIG_BOOTP_SUBNETMASK
122#define CONFIG_BOOTP_GATEWAY
123#define CONFIG_BOOTP_HOSTNAME
124#define CONFIG_BOOTP_BOOTPATH
125#define CONFIG_BOOTP_VENDOREX
126#define CONFIG_BOOTP_DNS
127#define CONFIG_BOOTP_BOOTFILESIZE
128
wdenkc6097192002-11-03 00:24:07 +0000129
wdenk8bde7f72003-06-27 21:31:46 +0000130/*
wdenk7f70e852003-05-20 14:25:27 +0000131 * how many time to fail & restart a net-TFTP before giving up & resetting
132 * the board hoping that a reset of net interface might help..
133 */
134#define CONFIG_NET_RESET 5
135
wdenk8bde7f72003-06-27 21:31:46 +0000136/*
wdenkc6097192002-11-03 00:24:07 +0000137 * bauds. Just to make it compile; in our case, I read the base_baud
138 * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn
139 * drives the system clock.
140 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_BASE_BAUD 403225
142#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkc6097192002-11-03 00:24:07 +0000143 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
144
wdenkc6097192002-11-03 00:24:07 +0000145/*
146 * Miscellaneous configurable options
147 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
149#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
150#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
151#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
152#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
wdenkc6097192002-11-03 00:24:07 +0000153
154
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
157#define CONFIG_SYS_DRAM_TEST 1
wdenkc6097192002-11-03 00:24:07 +0000158
159/*-----------------------------------------------------------------------
160 * Start addresses for the final memory configuration
161 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc6097192002-11-03 00:24:07 +0000163 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_SYS_SDRAM_BASE 0x00000000
165#define CONFIG_SYS_FLASH_BASE 0xFFC00000
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200166#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
wdenkc6097192002-11-03 00:24:07 +0000167
wdenkc6097192002-11-03 00:24:07 +0000168
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */
wdenkc6097192002-11-03 00:24:07 +0000170
171/*
172 * For booting Linux, the board info and command line data
173 * have to be in the first 8 MB of memory, since this is
174 * the maximum mapped by the Linux kernel during initialization.
175 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc6097192002-11-03 00:24:07 +0000177/*-----------------------------------------------------------------------
178 * FLASH organization
179 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
181#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
182#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
183#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkc6097192002-11-03 00:24:07 +0000184
185/* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200186#define CONFIG_ENV_OFFSET 0x3c8000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200187#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200188#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment area */
189#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
wdenkc6097192002-11-03 00:24:07 +0000190
wdenk7f70e852003-05-20 14:25:27 +0000191/* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
wdenkc6097192002-11-03 00:24:07 +0000192 * 32meg-(128k+some_malloc_space+copy-of-ENV sector)..
193 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_SDRAM_SIZE 32 /* megs of ram */
195#define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */
wdenkc6097192002-11-03 00:24:07 +0000196 /* the exception vector table */
197 /* to the end of the DRAM */
198 /* less monitor and malloc area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */
200#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128k for malloc space */
201#define CONFIG_SYS_MEM_END_USAGE ( CONFIG_SYS_MONITOR_LEN \
202 + CONFIG_SYS_MALLOC_LEN \
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200203 + CONFIG_ENV_SECT_SIZE \
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204 + CONFIG_SYS_STACK_USAGE )
wdenkc6097192002-11-03 00:24:07 +0000205
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE)
wdenkc6097192002-11-03 00:24:07 +0000207/* END ENVIRONNEMENT FLASH */
208
wdenkc6097192002-11-03 00:24:07 +0000209/*
210 * Init Memory Controller:
211 *
212 * BR0/1 and OR0/1 (FLASH)
213 */
214
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
wdenkc6097192002-11-03 00:24:07 +0000216
217
218/*-----------------------------------------------------------------------
219 * Definitions for initial stack pointer and data area (in OnChipMem )
220 */
wdenk7f70e852003-05-20 14:25:27 +0000221#if 1
222/* On Chip Memory location */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_TEMP_STACK_OCM 1
224#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
225#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
wdenk7f70e852003-05-20 14:25:27 +0000226
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200227#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200228#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200229#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk7f70e852003-05-20 14:25:27 +0000231#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
233#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
234#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200235#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200236#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk7f70e852003-05-20 14:25:27 +0000238#endif
wdenkc6097192002-11-03 00:24:07 +0000239
240/*-----------------------------------------------------------------------
241 * Definitions for Serial Presence Detect EEPROM address
242 */
243#define EEPROM_WRITE_ADDRESS 0xA0
244#define EEPROM_READ_ADDRESS 0xA1
245
wdenkc6097192002-11-03 00:24:07 +0000246#endif /* __CONFIG_H */