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Marek Vasut5434caf2013-06-16 15:39:02 +02001/*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19#ifndef __CONFIGS_MXS_H__
20#define __CONFIGS_MXS_H__
21
22/*
23 * Includes
24 */
25
26#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29#error Select one of CONFIG_MX23 or CONFIG_MX28 !
30#endif
31
32#include <asm/arch/regs-base.h>
33
34#if defined(CONFIG_MX23)
35#include <asm/arch/iomux-mx23.h>
36#elif defined(CONFIG_MX28)
37#include <asm/arch/iomux-mx28.h>
38#endif
39
40/*
41 * CPU specifics
42 */
Marek Vasut0782bdf2014-04-04 00:41:03 +020043#define CONFIG_SYS_GENERIC_BOARD
Marek Vasut5434caf2013-06-16 15:39:02 +020044
Marek Vasut5434caf2013-06-16 15:39:02 +020045/* MXS uses FDT */
46#define CONFIG_OF_LIBFDT
47
48/* Startup hooks */
49#define CONFIG_BOARD_EARLY_INIT_F
50#define CONFIG_ARCH_MISC_INIT
51
52/* SPL */
Marek Vasut5434caf2013-06-16 15:39:02 +020053#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
54#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
55#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
56#define CONFIG_SPL_LIBCOMMON_SUPPORT
57#define CONFIG_SPL_LIBGENERIC_SUPPORT
Heiko Schocher80402f32015-06-29 09:10:46 +020058#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasut5434caf2013-06-16 15:39:02 +020059#define CONFIG_SPL_GPIO_SUPPORT
60
61/* Memory sizes */
62#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
Marek Vasut5434caf2013-06-16 15:39:02 +020063#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
64#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
65
66/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
67#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
68#if defined(CONFIG_MX23)
69#define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
70#elif defined(CONFIG_MX28)
71#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
72#endif
73
74/* Point initial SP in SRAM so SPL can use it too. */
75#define CONFIG_SYS_INIT_SP_OFFSET \
76 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
77#define CONFIG_SYS_INIT_SP_ADDR \
78 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
79
80/*
81 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
82 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
83 * binary. In case there was more of this mess, 0x100 bytes are skipped.
Marek Vasut9c2c8a32014-03-05 20:01:13 +010084 *
85 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
86 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
87 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
88 *
89 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
90 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
Marek Vasut5434caf2013-06-16 15:39:02 +020091 */
Marek Vasut9c2c8a32014-03-05 20:01:13 +010092#define CONFIG_SYS_TEXT_BASE 0x40002000
93#define CONFIG_SPL_TEXT_BASE 0x00001000
Marek Vasut5434caf2013-06-16 15:39:02 +020094
95/* U-Boot general configuration */
96#define CONFIG_SYS_LONGHELP
Marek Vasut5434caf2013-06-16 15:39:02 +020097#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
Marek Vasut5434caf2013-06-16 15:39:02 +020098#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
99#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
100 /* Boot argument buffer size */
101#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
102#define CONFIG_AUTO_COMPLETE /* Command auto complete */
103#define CONFIG_CMDLINE_EDITING /* Command history etc */
104#define CONFIG_SYS_HUSH_PARSER
105#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
106
107/* Booting Linux */
108#define CONFIG_CMDLINE_TAG
109#define CONFIG_SETUP_MEMORY_TAGS
110
111/*
112 * Drivers
113 */
114
115/* APBH DMA */
116#define CONFIG_APBH_DMA
117
118/* GPIO */
119#define CONFIG_MXS_GPIO
120
Andreas Wass0cfb8af2013-08-16 18:24:37 +0200121/*
122 * DUART Serial Driver.
123 * Conflicts with AUART driver which can be set by board.
124 */
125#ifndef CONFIG_MXS_AUART
Marek Vasut5434caf2013-06-16 15:39:02 +0200126#define CONFIG_PL011_SERIAL
127#define CONFIG_PL011_CLOCK 24000000
128#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
129#define CONFIG_CONS_INDEX 0
Andreas Wass0cfb8af2013-08-16 18:24:37 +0200130#endif
Marek Vasut5434caf2013-06-16 15:39:02 +0200131/* Default baudrate can be overriden by board! */
132#ifndef CONFIG_BAUDRATE
133#define CONFIG_BAUDRATE 115200
134#endif
135
136/* FEC Ethernet on SoC */
137#ifdef CONFIG_FEC_MXC
138#define CONFIG_MII
139#ifndef CONFIG_ETHPRIME
140#define CONFIG_ETHPRIME "FEC0"
141#endif
142#ifndef CONFIG_FEC_XCV_TYPE
143#define CONFIG_FEC_XCV_TYPE RMII
144#endif
145#endif
146
147/* I2C */
148#ifdef CONFIG_CMD_I2C
Marek Vasut1fa96e82014-10-20 00:23:41 +0200149#define CONFIG_SYS_I2C
150#define CONFIG_SYS_I2C_MXS
Marek Vasut5434caf2013-06-16 15:39:02 +0200151#define CONFIG_HARD_I2C
152#ifndef CONFIG_SYS_I2C_SPEED
153#define CONFIG_SYS_I2C_SPEED 400000
154#endif
155#endif
156
157/* LCD */
158#ifdef CONFIG_VIDEO
159#define CONFIG_CFB_CONSOLE
160#define CONFIG_VIDEO_MXS
161#define CONFIG_VIDEO_SW_CURSOR
162#define CONFIG_VGA_AS_SINGLE_DEVICE
163#define CONFIG_SYS_CONSOLE_IS_IN_ENV
164#endif
165
166/* MMC */
167#ifdef CONFIG_CMD_MMC
168#define CONFIG_MMC
169#define CONFIG_GENERIC_MMC
170#define CONFIG_BOUNCE_BUFFER
171#define CONFIG_MXS_MMC
172#endif
173
174/* NAND */
175#ifdef CONFIG_CMD_NAND
176#define CONFIG_NAND_MXS
177#define CONFIG_SYS_MAX_NAND_DEVICE 1
178#define CONFIG_SYS_NAND_BASE 0x60000000
179#define CONFIG_SYS_NAND_5_ADDR_CYCLE
180#endif
181
Marek Vasut2bbcccf2014-03-06 01:52:03 +0100182/* OCOTP */
183#ifdef CONFIG_CMD_FUSE
184#define CONFIG_MXS_OCOTP
185#endif
186
Marek Vasut5434caf2013-06-16 15:39:02 +0200187/* SPI */
188#ifdef CONFIG_CMD_SPI
189#define CONFIG_HARD_SPI
190#define CONFIG_MXS_SPI
191#define CONFIG_SPI_HALF_DUPLEX
192#endif
193
194/* USB */
195#ifdef CONFIG_CMD_USB
196#define CONFIG_USB_EHCI
197#define CONFIG_USB_EHCI_MXS
198#define CONFIG_EHCI_IS_TDI
199#endif
200
201#endif /* __CONFIGS_MXS_H__ */