blob: 942081ab84d71198645699322ca61d6ac67d7874 [file] [log] [blame]
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Tom Rini65cc0e22022-11-16 13:10:41 -050012#define CFG_SYS_UBOOT_BASE \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010013 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
14
15#ifdef CONFIG_SPL_BUILD
16/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010017
18/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
Tom Rinidd5b58c2022-12-04 10:04:49 -050019#define CFG_MALLOC_F_ADDR 0x184000
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010020/* For RAW image gives a error info not panic */
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010021
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010022#endif /* CONFIG_SPL_BUILD */
23
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010024#define MEM_LAYOUT_ENV_SETTINGS \
Marcel Ziswilerbbe00892022-08-22 15:06:00 +020025 "fdt_addr_r=0x50200000\0" \
26 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
27 "kernel_comp_addr_r=0x40200000\0" \
Marcel Ziswiler559c5382022-09-22 23:28:32 +020028 "kernel_comp_size=0x08000000\0" \
Marcel Ziswilerbbe00892022-08-22 15:06:00 +020029 "ramdisk_addr_r=0x50300000\0" \
30 "scriptaddr=0x50280000\0"
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010031
32/* Enable Distro Boot */
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010033#define BOOT_TARGET_DEVICES(func) \
34 func(MMC, mmc, 1) \
35 func(MMC, mmc, 2) \
36 func(DHCP, dhcp, na)
37#include <config_distro_bootcmd.h>
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010038
39#if defined(CONFIG_TDX_EASY_INSTALLER)
40# define BOOT_SCRIPT "boot-tezi.scr"
41#else
42# define BOOT_SCRIPT "boot.scr"
43#endif
44
45/* Initial environment variables */
Tom Rini0613c362022-12-04 10:03:50 -050046#define CFG_EXTRA_ENV_SETTINGS \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010047 BOOTENV \
48 MEM_LAYOUT_ENV_SETTINGS \
49 "bootcmd_mfg=fastboot 0\0" \
50 "boot_file=Image\0" \
51 "boot_scripts=" BOOT_SCRIPT "\0" \
52 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
53 "console=ttymxc2\0" \
54 "fdt_board=dev\0" \
55 "initrd_addr=0x43800000\0" \
56 "initrd_high=0xffffffffffffffff\0" \
Philippe Schenkera3f2dcf2022-05-25 09:55:02 +020057 "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010058 "consoleblank=0 earlycon\0" \
59 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
60 "if test \"$confirm\" = \"y\"; then " \
61 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
62 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
63 "${blkcnt}; fi\0"
64
Tom Rini65cc0e22022-11-16 13:10:41 -050065#define CFG_SYS_INIT_RAM_ADDR 0x40000000
66#define CFG_SYS_INIT_RAM_SIZE SZ_512K
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010067
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010068/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
Tom Riniaa6e94d2022-11-16 13:10:37 -050069#define CFG_SYS_SDRAM_BASE 0x40000000
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010070#define PHYS_SDRAM 0x40000000
71#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
72#define PHYS_SDRAM_2 0x100000000
73#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
74
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010075#endif /* __VERDIN_IMX8MP_H */