blob: 8ba35cb98309c2c8ab094660cf84b33f3fffb3d5 [file] [log] [blame]
Masahiro Yamada252ed872015-03-12 13:24:39 +09001CONFIG_ARM=y
Trevor Woerner10015022019-05-03 09:41:00 -04002CONFIG_SPL_SYS_DCACHE_OFF=y
Masahiro Yamada5ca269a2015-03-16 16:43:24 +09003CONFIG_ARCH_ZYNQ=y
Michal Simek6ebf8a42016-12-16 11:57:17 +01004CONFIG_SYS_TEXT_BASE=0x4000000
Tom Rinid168bcb2019-04-29 15:54:04 -04005CONFIG_SPL_STACK_R_ADDR=0x200000
Michal Simek734bf172018-03-23 09:34:00 +01006CONFIG_SPL=y
Michal Simekdcd8a102018-06-04 08:33:30 +02007CONFIG_DEBUG_UART_BASE=0xe0001000
8CONFIG_DEBUG_UART_CLOCK=50000000
Michal Simek0732d7c2017-12-13 10:35:06 +01009CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010"
Michal Simek4c82ab92017-11-02 10:40:57 +010010CONFIG_DEBUG_UART=y
Michal Simeka5870512018-01-09 19:31:16 +010011CONFIG_DISTRO_DEFAULTS=y
Ruchika Gupta11a96622015-01-23 16:01:53 +053012CONFIG_FIT=y
Ruchika Gupta11a96622015-01-23 16:01:53 +053013CONFIG_FIT_SIGNATURE=y
Jagan Teki3788b452017-01-21 11:48:33 +010014CONFIG_FIT_VERBOSE=y
Alex Kiernan002c3232018-04-20 21:25:38 +000015CONFIG_IMAGE_FORMAT_LEGACY=y
Michal Simek52b36fd2017-12-01 13:50:33 +010016CONFIG_SPL_STACK_R=y
Heiko Schocherc20ae2f2016-10-06 07:55:15 +020017CONFIG_SPL_OS_BOOT=y
Marek Vasut55500432018-04-07 16:05:27 +020018CONFIG_SPL_SPI_LOAD=y
Siva Durga Prasad Paladuguc5ca2db2016-01-11 12:01:10 +053019CONFIG_SYS_PROMPT="Zynq> "
Joe Hershbergeref0f2f52015-06-22 16:15:30 -050020# CONFIG_CMD_FLASH is not set
Simon Glassfe7604a2017-05-17 03:25:21 -060021CONFIG_CMD_FPGA_LOADBP=y
22CONFIG_CMD_FPGA_LOADFS=y
23CONFIG_CMD_FPGA_LOADMK=y
24CONFIG_CMD_FPGA_LOADP=y
Thomas Choue4aa8ed2015-11-11 21:39:33 +080025CONFIG_CMD_GPIO=y
Tom Rini88663122017-08-14 19:58:53 -040026CONFIG_CMD_MMC=y
27CONFIG_CMD_SF=y
Joe Hershbergeref0f2f52015-06-22 16:15:30 -050028# CONFIG_CMD_SETEXPR is not set
Tom Rini78d1e1d2016-04-22 16:41:25 -040029CONFIG_CMD_TFTPPUT=y
Tom Rini89cb2b52016-04-24 17:29:26 -040030CONFIG_CMD_CACHE=y
Tom Rini89cb2b52016-04-24 17:29:26 -040031CONFIG_CMD_EXT4_WRITE=y
Tom Rinifa2c1462018-02-10 16:54:38 -050032# CONFIG_SPL_DOS_PARTITION is not set
Tom Rinifa2c1462018-02-10 16:54:38 -050033# CONFIG_SPL_EFI_PARTITION is not set
Tom Rini8c5cad02018-09-03 15:26:12 -040034CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
Tom Rini5dc4dfd2017-08-28 07:16:32 -040035CONFIG_ENV_IS_IN_SPI_FLASH=y
Masahiro Yamada739968f2015-07-17 20:26:06 +090036CONFIG_NET_RANDOM_ETHADDR=y
Nathan Rossi5c9b1d72016-01-08 03:00:46 +100037CONFIG_SPL_DM_SEQ_ALIAS=y
Michal Simek7fad6122017-11-03 15:53:56 +010038CONFIG_FPGA_XILINX=y
Vipul Kumar3990c9d2018-02-16 18:02:51 +053039CONFIG_FPGA_ZYNQPL=y
Michal Simek93561a32018-01-09 15:27:31 +010040CONFIG_DM_GPIO=y
Masahiro Yamadae1ce61f2016-12-07 22:10:28 +090041CONFIG_MMC_SDHCI=y
Michal Simek2e0583b2017-02-10 13:57:35 +010042CONFIG_MMC_SDHCI_ZYNQ=y
Joe Hershbergerc9bb9422015-06-22 16:15:29 -050043CONFIG_SPI_FLASH=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +010044CONFIG_SF_DEFAULT_SPEED=30000000
Michal Simek13f451b2016-01-25 15:39:26 +010045CONFIG_SPI_FLASH_ISSI=y
Michal Simekb2ff7fb2017-11-02 10:44:48 +010046CONFIG_SPI_FLASH_MACRONIX=y
Bin Meng68d53422015-11-25 05:34:54 -080047CONFIG_SPI_FLASH_SPANSION=y
48CONFIG_SPI_FLASH_STMICRO=y
49CONFIG_SPI_FLASH_SST=y
50CONFIG_SPI_FLASH_WINBOND=y
Vipul Kumar77217c42018-01-24 10:51:30 +053051CONFIG_PHY_MARVELL=y
52CONFIG_PHY_REALTEK=y
53CONFIG_PHY_XILINX=y
Adam Fordd7869b22018-07-20 23:03:57 -050054CONFIG_MII=y
Michal Simek596e5782015-11-30 14:34:52 +010055CONFIG_ZYNQ_GEM=y
Michal Simek4c82ab92017-11-02 10:40:57 +010056CONFIG_DEBUG_UART_ZYNQ=y
Michal Simek809704e2017-11-06 09:16:05 +010057CONFIG_ZYNQ_SERIAL=y
Bin Menge5d5d442015-11-25 05:34:53 -080058CONFIG_ZYNQ_SPI=y
Jagan Teki38a41672015-08-31 17:38:40 +053059CONFIG_ZYNQ_QSPI=y