blob: 9b30451b28e7ab95e8a8e3fc3ec6bafe0394416f [file] [log] [blame]
Simon Glass3a1a18f2015-01-27 22:13:47 -07001/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <mmc.h>
9#include <pci_ids.h>
Bin Mengfe3fbd32015-07-30 03:49:18 -070010#include <asm/irq.h>
Bin Meng8b185042015-10-11 21:37:43 -070011#include <asm/mrccache.h>
Simon Glass3a1a18f2015-01-27 22:13:47 -070012#include <asm/post.h>
13
14static struct pci_device_id mmc_supported[] = {
15 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
16 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
17};
18
19int cpu_mmc_init(bd_t *bis)
20{
Simon Glass3a1a18f2015-01-27 22:13:47 -070021 return pci_mmc_init("ValleyView SDHCI", mmc_supported,
22 ARRAY_SIZE(mmc_supported));
23}
24
Simon Glassb4302582015-08-04 12:34:02 -060025#ifndef CONFIG_EFI_APP
Simon Glass3a1a18f2015-01-27 22:13:47 -070026int arch_cpu_init(void)
27{
28 int ret;
29
30 post_code(POST_CPU_INIT);
Simon Glass3a1a18f2015-01-27 22:13:47 -070031
32 ret = x86_cpu_init_f();
33 if (ret)
34 return ret;
35
36 return 0;
37}
Bin Mengfe3fbd32015-07-30 03:49:18 -070038
39int arch_misc_init(void)
40{
Simon Glassc8896ee2015-08-10 07:05:12 -060041 if (!ll_boot_init())
42 return 0;
Simon Glass46f8efe2015-08-10 07:05:10 -060043
Bin Meng8b185042015-10-11 21:37:43 -070044#ifdef CONFIG_ENABLE_MRC_CACHE
45 /*
46 * We intend not to check any return value here, as even MRC cache
47 * is not saved successfully, it is not a severe error that will
48 * prevent system from continuing to boot.
49 */
50 mrccache_save();
51#endif
52
Bin Mengfa6af7b2015-08-20 06:40:22 -070053 return pirq_init();
Bin Mengfe3fbd32015-07-30 03:49:18 -070054}
Bin Meng8b185042015-10-11 21:37:43 -070055
56int reserve_arch(void)
57{
58#ifdef CONFIG_ENABLE_MRC_CACHE
59 return mrccache_reserve();
60#else
61 return 0;
62#endif
63}
Simon Glassb4302582015-08-04 12:34:02 -060064#endif
Bin Meng74e56d12015-10-11 21:37:45 -070065
66void reset_cpu(ulong addr)
67{
68 /* cold reset */
69 x86_full_reset();
70}