blob: 3d37257189e0acfc19b89562ecd8858d4096271d [file] [log] [blame]
Thierry Reding1cbdf2d2012-06-04 20:02:25 +00001/dts-v1/;
2
Tom Warren90b079c2013-02-21 12:31:28 +00003#include "tegra20-tamonten.dtsi"
Thierry Reding1cbdf2d2012-06-04 20:02:25 +00004
5/ {
6 model = "Avionic Design Medcom-Wide";
Thierry Reding66b796a2012-09-19 00:37:21 +00007 compatible = "ad,medcom-wide", "nvidia,tegra20";
Thierry Reding1cbdf2d2012-06-04 20:02:25 +00008
Simon Glassc3691392014-09-04 16:27:35 -06009 chosen {
10 stdout-path = &uartd;
11 };
12
Thierry Reding1cbdf2d2012-06-04 20:02:25 +000013 aliases {
14 usb0 = "/usb@c5008000";
Tom Warren126685a2013-02-21 12:31:29 +000015 sdhci0 = "/sdhci@c8000600";
Thierry Reding1cbdf2d2012-06-04 20:02:25 +000016 };
17
18 memory {
19 reg = <0x00000000 0x20000000>;
20 };
21
Simon Glassee7d7552016-01-30 16:37:52 -070022 host1x@50000000 {
Thierry Reding7c3f3862012-11-23 00:58:50 +000023 status = "okay";
24
25 dc@54200000 {
26 status = "okay";
27
28 rgb {
29 nvidia,panel = <&lcd_panel>;
30 status = "okay";
31 };
32 };
33 };
34
Thierry Reding1cbdf2d2012-06-04 20:02:25 +000035 serial@70006300 {
36 clock-frequency = <216000000>;
37 };
38
Simon Glassee7d7552016-01-30 16:37:52 -070039 usb@c5008000 {
40 status = "okay";
Thierry Reding1cbdf2d2012-06-04 20:02:25 +000041 };
Thierry Reding7c3f3862012-11-23 00:58:50 +000042
Simon Glass91c08af2016-01-30 16:38:01 -070043 pwm: pwm@7000a000 {
44 status = "okay";
45 };
46
Thierry Reding7c3f3862012-11-23 00:58:50 +000047 lcd_panel: panel {
48 clock = <61715000>;
49 xres = <1366>;
50 yres = <768>;
51 left-margin = <2>;
52 right-margin = <47>;
53 hsync-len = <136>;
54 lower-margin = <21>;
55 upper-margin = <11>;
56 vsync-len = <4>;
57
58 nvidia,bits-per-pixel = <16>;
59 nvidia,pwm = <&pwm 0 500000>;
Simon Glass2b2b50b2015-01-05 20:05:41 -070060 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
61 GPIO_ACTIVE_HIGH>;
62 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
63 GPIO_ACTIVE_HIGH>;
64 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
65 GPIO_ACTIVE_HIGH>;
Thierry Reding7c3f3862012-11-23 00:58:50 +000066 nvidia,panel-timings = <0 0 0 0>;
67 };
Thierry Reding1cbdf2d2012-06-04 20:02:25 +000068};