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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Andy Flemingb21f87a32014-07-25 17:39:08 -05004 * Andy Fleming <afleming@gmail.com>
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
Andy Fleming5f184712011-04-08 02:10:27 -05006 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9#ifndef _PHY_H
10#define _PHY_H
11
Roger Quadrosa0e02c62024-02-28 12:35:26 +020012#include <asm-generic/gpio.h>
Simon Glass2a64ada2020-07-19 10:15:39 -060013#include <log.h>
14#include <phy_interface.h>
15#include <dm/ofnode.h>
16#include <dm/read.h>
Simon Glassf2176512020-02-03 07:36:17 -070017#include <linux/errno.h>
Andy Fleming5f184712011-04-08 02:10:27 -050018#include <linux/list.h>
19#include <linux/mii.h>
20#include <linux/ethtool.h>
21#include <linux/mdio.h>
Simon Glass2a64ada2020-07-19 10:15:39 -060022
23struct udevice;
Andy Fleming5f184712011-04-08 02:10:27 -050024
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010025#define PHY_FIXED_ID 0xa5a55a5a
Samuel Mendoza-Jonasf641a8a2019-06-18 11:37:17 +100026#define PHY_NCSI_ID 0xbeefcafe
27
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +053028/*
29 * There is no actual id for this.
30 * This is just a dummy id for gmii2rgmmi converter.
31 */
32#define PHY_GMII2RGMII_ID 0x5a5a5a5a
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010033
Andy Fleming5f184712011-04-08 02:10:27 -050034#define PHY_MAX_ADDR 32
35
Shaohui Xieddcd1f32016-01-28 15:55:46 +080036#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
37
Florian Fainelli4dae6102016-01-13 16:59:33 +030038#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
Andy Fleming5f184712011-04-08 02:10:27 -050039 SUPPORTED_TP | \
40 SUPPORTED_MII)
41
Florian Fainelli4dae6102016-01-13 16:59:33 +030042#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
43 SUPPORTED_10baseT_Full)
44
45#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
46 SUPPORTED_100baseT_Full)
47
48#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
Andy Fleming5f184712011-04-08 02:10:27 -050049 SUPPORTED_1000baseT_Full)
50
Florian Fainelli4dae6102016-01-13 16:59:33 +030051#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
52 PHY_100BT_FEATURES | \
53 PHY_DEFAULT_FEATURES)
54
55#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
56 PHY_1000BT_FEATURES)
57
Andy Fleming5f184712011-04-08 02:10:27 -050058#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
59 SUPPORTED_10000baseT_Full)
60
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020061#ifndef PHY_ANEG_TIMEOUT
Andy Fleming5f184712011-04-08 02:10:27 -050062#define PHY_ANEG_TIMEOUT 4000
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020063#endif
Andy Fleming5f184712011-04-08 02:10:27 -050064
65
Andy Fleming5f184712011-04-08 02:10:27 -050066struct phy_device;
67
68#define MDIO_NAME_LEN 32
69
70struct mii_dev {
71 struct list_head link;
72 char name[MDIO_NAME_LEN];
73 void *priv;
74 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
75 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
76 u16 val);
77 int (*reset)(struct mii_dev *bus);
78 struct phy_device *phymap[PHY_MAX_ADDR];
79 u32 phy_mask;
Roger Quadrosa0e02c62024-02-28 12:35:26 +020080 /** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
81 int reset_delay_us;
82 /** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
83 int reset_post_delay_us;
84 /** @reset_gpiod: Bus Reset GPIO descriptor pointer */
85 struct gpio_desc reset_gpiod;
Andy Fleming5f184712011-04-08 02:10:27 -050086};
87
88/* struct phy_driver: a structure which defines PHY behavior
89 *
90 * uid will contain a number which represents the PHY. During
91 * startup, the driver will poll the PHY to find out what its
92 * UID--as defined by registers 2 and 3--is. The 32-bit result
93 * gotten from the PHY will be masked to
94 * discard any bits which may change based on revision numbers
95 * unimportant to functionality
96 *
97 */
98struct phy_driver {
99 char *name;
100 unsigned int uid;
101 unsigned int mask;
102 unsigned int mmds;
103
104 u32 features;
105
106 /* Called to do any driver startup necessities */
107 /* Will be called during phy_connect */
108 int (*probe)(struct phy_device *phydev);
109
110 /* Called to configure the PHY, and modify the controller
111 * based on the results. Should be called after phy_connect */
112 int (*config)(struct phy_device *phydev);
113
114 /* Called when starting up the controller */
115 int (*startup)(struct phy_device *phydev);
116
117 /* Called when bringing down the controller */
118 int (*shutdown)(struct phy_device *phydev);
119
Stefano Babicb71841b2013-09-02 15:42:30 +0200120 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
121 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
122 u16 val);
Carlo Caione4f6746d2019-02-08 17:25:06 +0000123
124 /* Phy specific driver override for reading a MMD register */
125 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
126
127 /* Phy specific driver override for writing a MMD register */
128 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
129 u16 val);
130
Alex Margineand718b692019-11-14 18:28:29 +0200131 /* driver private data */
132 ulong data;
Andy Fleming5f184712011-04-08 02:10:27 -0500133};
134
135struct phy_device {
136 /* Information about the PHY type */
137 /* And management functions */
138 struct mii_dev *bus;
139 struct phy_driver *drv;
140 void *priv;
141
Simon Glassc74c8e62015-04-05 16:07:39 -0600142 struct udevice *dev;
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500143 ofnode node;
Andy Fleming5f184712011-04-08 02:10:27 -0500144
145 /* forced speed & duplex (no autoneg)
146 * partner speed & duplex & pause (autoneg)
147 */
148 int speed;
149 int duplex;
150
151 /* The most recently read link state */
152 int link;
153 int port;
154 phy_interface_t interface;
155
156 u32 advertising;
157 u32 supported;
158 u32 mmds;
159
160 int autoneg;
161 int addr;
162 int pause;
163 int asym_pause;
164 u32 phy_id;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000165 bool is_c45;
Andy Fleming5f184712011-04-08 02:10:27 -0500166 u32 flags;
167};
168
Shaohui Xief55a7762013-11-14 19:00:31 +0800169struct fixed_link {
170 int phy_id;
171 int duplex;
172 int link_speed;
173 int pause;
174 int asym_pause;
175};
176
Alex Margineanc38ac282019-07-11 18:32:56 +0300177/**
Alex Margineanc38ac282019-07-11 18:32:56 +0300178 * phy_reset() - Resets the specified PHY
Alex Margineanc38ac282019-07-11 18:32:56 +0300179 * Issues a reset of the PHY and waits for it to complete
180 *
181 * @phydev: PHY to reset
Dan Murphyea756fb2020-05-04 16:14:37 -0500182 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300183 */
Andy Fleming5f184712011-04-08 02:10:27 -0500184int phy_reset(struct phy_device *phydev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300185
186/**
187 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
Alex Margineanc38ac282019-07-11 18:32:56 +0300188 * The function checks the PHY addresses flagged in phy_mask and returns a
189 * phy_device pointer if it detects a PHY.
190 * This function should only be called if just one PHY is expected to be present
191 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
192 * it is undefined which of these PHYs is returned.
193 *
194 * @bus: MII/MDIO bus to scan
195 * @phy_mask: bitmap of PYH addresses to scan
Dan Murphyea756fb2020-05-04 16:14:37 -0500196 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300197 */
Marek BehĂșne24b58f2022-04-07 00:33:08 +0200198struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
Alex Margineanc38ac282019-07-11 18:32:56 +0300199
Vladimir Olteand0781c92021-01-25 14:23:52 +0200200#ifdef CONFIG_PHY_FIXED
201
202/**
203 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
204 * @node: OF node for the container of the fixed-link node
205 *
206 * Description: Creates a struct phy_device based on a fixed-link of_node
207 * description. Can be used without phy_connect by drivers which do not expose
208 * a UCLASS_ETH udevice.
209 */
210struct phy_device *fixed_phy_create(ofnode node);
211
212#else
213
214static inline struct phy_device *fixed_phy_create(ofnode node)
215{
216 return NULL;
217}
218
219#endif
220
Alex Margineanc38ac282019-07-11 18:32:56 +0300221/**
Alex Margineanc38ac282019-07-11 18:32:56 +0300222 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300223 * Creates a PHY device for the PHY at the given address, if one doesn't exist
224 * already, and associates it with the Ethernet device.
225 * The function may be called with addr <= 0, in this case addr value is ignored
226 * and the bus is scanned to detect a PHY. Scanning should only be used if only
227 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
228 * which PHY is returned.
229 *
230 * @bus: MII/MDIO bus that hosts the PHY
231 * @addr: PHY address on MDIO bus
232 * @dev: Ethernet device to associate to the PHY
233 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500234 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300235 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600236struct phy_device *phy_connect(struct mii_dev *bus, int addr,
237 struct udevice *dev,
238 phy_interface_t interface);
Michal Simek32491162022-02-23 15:45:41 +0100239/**
240 * phy_device_create() - Create a PHY device
241 *
242 * @bus: MII/MDIO bus that hosts the PHY
243 * @addr: PHY address on MDIO bus
244 * @phy_id: where to store the ID retrieved
245 * @is_c45: Device Identifiers if is_c45
Michal Simek32491162022-02-23 15:45:41 +0100246 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
247 */
248struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
Marek BehĂșne24b58f2022-04-07 00:33:08 +0200249 u32 phy_id, bool is_c45);
Alex Margineanc38ac282019-07-11 18:32:56 +0300250
Michal Simeka744a282022-02-23 15:45:42 +0100251/**
252 * phy_connect_phy_id() - Connect to phy device by reading PHY id
253 * from phy node.
254 *
255 * @bus: MII/MDIO bus that hosts the PHY
256 * @dev: Ethernet device to associate to the PHY
Michal Simeka744a282022-02-23 15:45:42 +0100257 * @return: pointer to phy_device if a PHY is found,
258 * or NULL otherwise
259 */
260struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
Tom Rini7f418ea2022-04-15 08:09:52 -0400261 int phyaddr);
Michal Simeka744a282022-02-23 15:45:42 +0100262
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500263static inline ofnode phy_get_ofnode(struct phy_device *phydev)
264{
265 if (ofnode_valid(phydev->node))
266 return phydev->node;
267 else
268 return dev_ofnode(phydev->dev);
269}
Ramon Fried65f22662022-06-05 03:44:15 +0300270
Marek Vasut1f614d52023-03-19 18:08:08 +0100271/**
272 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
273 * condition is met or a timeout occurs
274 *
275 * @phydev: The phy_device struct
276 * @devaddr: The MMD to read from
277 * @regnum: The register on the MMD to read
278 * @val: Variable to read the register into
279 * @cond: Break condition (usually involving @val)
280 * @sleep_us: Maximum time to sleep between reads in us (0
281 * tight-loops). Should be less than ~20ms since usleep_range
282 * is used (see Documentation/timers/timers-howto.rst).
283 * @timeout_us: Timeout in us, 0 means never timeout
284 * @sleep_before_read: if it is true, sleep @sleep_us before read.
285 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
286 * case, the last read value at @args is stored in @val. Must not
287 * be called from atomic context if sleep_us or timeout_us are used.
288 */
289#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
290 sleep_us, timeout_us, sleep_before_read) \
291({ \
292 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
293 sleep_us, timeout_us, \
294 phydev, devaddr, regnum); \
295 if (val < 0) \
296 __ret = val; \
297 if (__ret) \
298 dev_err(phydev->dev, "%s failed: %d\n", __func__, __ret); \
299 __ret; \
300})
301
Ramon Fried65f22662022-06-05 03:44:15 +0300302int phy_read(struct phy_device *phydev, int devad, int regnum);
303int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
304void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
305int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
306int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
307int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
308int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
Marek Vasut87b75022023-03-19 18:08:07 +0100309int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
310 u16 mask, u16 set);
311int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
312 u16 mask, u16 set);
Ramon Fried65f22662022-06-05 03:44:15 +0300313
Andy Fleming5f184712011-04-08 02:10:27 -0500314int phy_startup(struct phy_device *phydev);
315int phy_config(struct phy_device *phydev);
316int phy_shutdown(struct phy_device *phydev);
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300317int phy_set_supported(struct phy_device *phydev, u32 max_speed);
Ariel D'Alessandro087baf82022-04-12 10:31:36 -0300318int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
319 u16 set);
Andy Fleming5f184712011-04-08 02:10:27 -0500320int genphy_config_aneg(struct phy_device *phydev);
Troy Kisky8682aba2012-02-07 14:08:48 +0000321int genphy_restart_aneg(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500322int genphy_update_link(struct phy_device *phydev);
Yegor Yefremove2043f52012-11-28 11:15:17 +0100323int genphy_parse_link(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500324int genphy_config(struct phy_device *phydev);
325int genphy_startup(struct phy_device *phydev);
326int genphy_shutdown(struct phy_device *phydev);
327int gen10g_config(struct phy_device *phydev);
328int gen10g_startup(struct phy_device *phydev);
329int gen10g_shutdown(struct phy_device *phydev);
330int gen10g_discover_mmds(struct phy_device *phydev);
331
Marek Vasut7940a932023-03-19 18:02:42 +0100332/**
333 * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver
334 * @__name: name of the driver
335 */
336#define U_BOOT_PHY_DRIVER(__name) \
337 ll_entry_declare(struct phy_driver, __name, phy_driver)
338
Fabio Estevam2fb63962014-02-15 14:52:00 -0200339int board_phy_config(struct phy_device *phydev);
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800340int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
Fabio Estevam2fb63962014-02-15 14:52:00 -0200341
Simon Glassc74c8e62015-04-05 16:07:39 -0600342/**
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500343 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
344 * is RGMII (all variants)
345 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500346 * @return: true if MII bus is RGMII or false if it is not
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500347 */
348static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
349{
Nishanth Menon09005c22023-04-14 17:06:45 -0500350 switch (phydev->interface) {
351 case PHY_INTERFACE_MODE_RGMII:
352 case PHY_INTERFACE_MODE_RGMII_ID:
353 case PHY_INTERFACE_MODE_RGMII_RXID:
354 case PHY_INTERFACE_MODE_RGMII_TXID:
355 return 1;
356 default:
357 return 0;
358 }
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500359}
360
Samuel Mendoza-Jonas09bd3d02022-08-08 21:46:03 +0930361bool phy_interface_is_ncsi(void);
362
Timur Tabia8366262011-10-18 18:44:34 -0500363/* PHY UIDs for various PHYs that are referenced in external code */
Wolfgang Denk0cf207e2021-09-27 17:42:39 +0200364#define PHY_UID_CS4340 0x13e51002
365#define PHY_UID_CS4223 0x03e57003
Priyanka Jain1ddcf5e2018-10-11 04:47:05 +0000366#define PHY_UID_TN2020 0x00a19410
367#define PHY_UID_IN112525_S03 0x02107440
Timur Tabia8366262011-10-18 18:44:34 -0500368
Andy Fleming5f184712011-04-08 02:10:27 -0500369#endif