blob: d3445bd92d9efdb443e524e94aa2f7cb001fce4c [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <pci.h>
27
28int checkboard (void)
29{
30 /*TODO: Check processor type */
31
32 puts ( "Board: Sandpoint "
33#ifdef CONFIG_MPC8240
34 "8240"
35#endif
36#ifdef CONFIG_MPC8245
37 "8245"
38#endif
39 " Unity ##Test not implemented yet##\n");
40 return 0;
41}
42
43#if 0 /* NOT USED */
44int checkflash (void)
45{
46 /* TODO: XXX XXX XXX */
47 printf ("## Test not implemented yet ##\n");
48
49 return (0);
50}
51#endif
52
53long int initdram (int board_type)
54{
wdenkc83bf6a2004-01-06 22:38:14 +000055 long size;
56 long new_bank0_end;
57 long mear1;
58 long emear1;
wdenkc6097192002-11-03 00:24:07 +000059
wdenkc83bf6a2004-01-06 22:38:14 +000060 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenkc6097192002-11-03 00:24:07 +000061
wdenkc83bf6a2004-01-06 22:38:14 +000062 new_bank0_end = size - 1;
63 mear1 = mpc824x_mpc107_getreg(MEAR1);
64 emear1 = mpc824x_mpc107_getreg(EMEAR1);
65 mear1 = (mear1 & 0xFFFFFF00) |
66 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
67 emear1 = (emear1 & 0xFFFFFF00) |
68 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
69 mpc824x_mpc107_setreg(MEAR1, mear1);
70 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkc6097192002-11-03 00:24:07 +000071
wdenkc83bf6a2004-01-06 22:38:14 +000072 return (size);
wdenkc6097192002-11-03 00:24:07 +000073}
74
75/*
76 * Initialize PCI Devices, report devices found.
77 */
78#ifndef CONFIG_PCI_PNP
79static struct pci_config_table pci_sandpoint_config_table[] = {
80 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
81 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
82 PCI_ENET0_MEMADDR,
83 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
84 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
85 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
86 PCI_ENET1_MEMADDR,
87 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
88 { }
89};
90#endif
91
92struct pci_controller hose = {
93#ifndef CONFIG_PCI_PNP
94 config_table: pci_sandpoint_config_table,
95#endif
96};
97
stroesead10dd92003-02-14 11:21:23 +000098void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +000099{
100 pci_mpc824x_init(&hose);
101}