blob: 2b9bb5c5f5be98683ee69db83689cc0384b8c3fd [file] [log] [blame]
Shaohui Xie5d898a02012-08-10 02:49:35 +00001------------------------------------------------------------------
2Freescale PBL(pre-boot loader) Boot Image generation using mkimage
3------------------------------------------------------------------
4
5The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
6NAND, etc. These SoCs use PBL to load RCW and/or pre-initialization
7instructions. For more details refer section 5 Pre-boot loader
8specifications of reference manual P3041RM/P4080RM/P5020RM at link:
9http://www.freescale.com/webapp/search/Serp.jsp?Reference+Manuals
10
11Building PBL Boot Image and boot steps
12--------------------------------------
13
141. Building PBL Boot Image.
15 The default Image is u-boot.pbl.
16
17 For eSPI boot(available on P3041/P4080/P5020):
18 To build the eSPI boot image:
19 make <board_name>_SPIFLASH_config
20 make u-boot.pbl
21
22 For SD boot(available on P3041/P4080/P5020):
23 To build the SD boot image:
24 make <board_name>_SDCARD_config
25 make u-boot.pbl
26
27 For Nand boot(available on P3041/P5020):
28 To build the NAND boot image:
29 make <board_name>_NAND_config
30 make u-boot.pbl
31
32
332. pblimage support available with mkimage utility will generate Freescale PBL
34boot image that can be flashed on the board eSPI flash, SD/MMC and NAND.
35Following steps describe it in detail.
36
37 1). Boot from eSPI flash
38 Write u-boot.pbl to eSPI flash from offset 0x0.
39 for ex in u-boot:
40 =>tftp 100000 u-boot.pbl
41 =>sf probe 0
42 =>sf erase 0 100000
43 =>sf write 100000 0 $filesize
44 Change SW1[1:5] = off off on off on.
45
46 2). Boot from SD/MMC
47 Write u-boot.pbl to SD/MMC from offset 0x1000.
48 for ex in u-boot:
49 =>tftp 100000 u-boot.pbl
50 =>mmcinfo
51 =>mmc write 100000 8 441
52 Change SW1[1:5] = off off on on off.
53
54 3). Boot from Nand
55 Write u-boot.pbl to Nand from offset 0x0.
56 for ex in u-boot:
57 =>tftp 100000 u-boot.pbl
58 =>nand info
59 =>nand erase 0 100000
60 =>nand write 100000 0 $filesize
61 Change SW1[1:5] = off on off off on
62 Change SW7[1:4] = on off off on
63
64Board specific configuration file specifications:
65------------------------------------------------
661. Configuration files rcw.cfg and pbi.cfg must present in the
67board/freescale/corenet_ds/, rcw.cfg is for RCW, pbi.cfg is for
68PBI instructions. File name must not be changed since they are used
69in Makefile.
702. These files can have empty lines and lines starting with "#" as first
71character to put comments
72
73Typical example of rcw.cfg file:
74-----------------------------------
75
76#PBL preamble and RCW header
77aa55aa55 010e0100
78#64 bytes RCW data
794c580000 00000000 18185218 0000cccc
8040464000 3c3c2000 58000000 61000000
8100000000 00000000 00000000 008b6000
8200000000 00000000 00000000 00000000
83
84Typical example of pbi.cfg file:
85-----------------------------------
86
87#PBI commands
88#Initialize CPC1
8909010000 00200400
9009138000 00000000
91091380c0 00000100
9209010100 00000000
9309010104 fff0000b
9409010f00 08000000
9509010000 80000000
96#Configure LAW for CPC1
9709000d00 00000000
9809000d04 fff00000
9909000d08 81000013
10009000010 00000000
10109000014 ff000000
10209000018 81000000
103#Initialize eSPI controller
10409110000 80000403
10509110020 2d170008
10609110024 00100008
10709110028 00100008
1080911002c 00100008
109#Flush PBL data
11009138000 00000000
111091380c0 00000000
112
113------------------------------------------------
114Author: Shaohui Xie<Shaohui.Xie@freescale.com>