blob: b099004937df792cba60bd1f65fbf426338bd30d [file] [log] [blame]
Ilko Iliev7666ccc2021-04-23 09:45:52 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_CM_H
7#define __IMX8M_CM_H
8
9#include <linux/sizes.h>
10#include <linux/stringify.h>
11#include <asm/arch/imx-regs.h>
12
13#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
14
15#define CONFIG_SPL_MAX_SIZE (124 * 1024)
16#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Ilko Iliev7666ccc2021-04-23 09:45:52 +020017
18#ifdef CONFIG_SPL_BUILD
19#define CONFIG_SPL_STACK 0x187FF0
20#define CONFIG_SPL_BSS_START_ADDR 0x00180000
21#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
22#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
23#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
24#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
25
26/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
27#define CONFIG_MALLOC_F_ADDR 0x182000
28/* For RAW image gives a error info not panic */
29#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
30
31#endif
32
33#define CONFIG_REMAKE_ELF
34
35/* ENET Config */
36/* ENET1 */
37#if defined(CONFIG_CMD_NET)
38#define CONFIG_ETHPRIME "FEC"
39#endif
40
41#ifndef CONFIG_SPL_BUILD
42#define BOOT_TARGET_DEVICES(func) \
43 func(MMC, mmc, 0) \
44 func(MMC, mmc, 1) \
45 func(DHCP, dhcp, na)
46
47#include <config_distro_bootcmd.h>
48#endif
49
50/* Initial environment variables */
51#define CONFIG_EXTRA_ENV_SETTINGS \
52 BOOTENV \
53 "scriptaddr=0x43500000\0" \
54 "kernel_addr_r=0x40880000\0" \
55 "image=Image\0" \
56 "console=ttymxc0,115200\0" \
57 "fdt_addr=0x43000000\0" \
58 "boot_fdt=try\0" \
59 "fdt_file=imx8mq-cm.dtb\0" \
60 "initrd_addr=0x43800000\0" \
61 "bootm_size=0x10000000\0" \
Tom Rinide35b8f2021-12-11 14:55:52 -050062 "mmcpart=1\0" \
Ilko Iliev7666ccc2021-04-23 09:45:52 +020063 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
64
65/* Link Definitions */
Ilko Iliev7666ccc2021-04-23 09:45:52 +020066
67#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
68#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
69#define CONFIG_SYS_INIT_SP_OFFSET \
70 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
71#define CONFIG_SYS_INIT_SP_ADDR \
72 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
73
74#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
75
Ilko Iliev7666ccc2021-04-23 09:45:52 +020076#define CONFIG_SYS_SDRAM_BASE 0x40000000
77#define PHYS_SDRAM 0x40000000
78#define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
79
80#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
81
82/* Monitor Command Prompt */
83#define CONFIG_SYS_CBSIZE 1024
84#define CONFIG_SYS_MAXARGS 64
85#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
86#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
87 sizeof(CONFIG_SYS_PROMPT) + 16)
88
Ilko Iliev7666ccc2021-04-23 09:45:52 +020089#define CONFIG_SYS_FSL_USDHC_NUM 2
90#define CONFIG_SYS_FSL_ESDHC_ADDR 0
91
Ilko Iliev7666ccc2021-04-23 09:45:52 +020092#endif