blob: 8e54310b9cbf6b1be49d40c67a9b193fae20d530 [file] [log] [blame]
Green Wana74e9d82021-05-27 06:52:07 -07001# SPDX-License-Identifier: GPL-2.0+
2#
3# Copyright (C) 2020-2021 SiFive, Inc
4# Pragnesh Patel <pragnesh.patel@sifive.com>
5
6config SIFIVE_FU740
7 bool
8 select ARCH_EARLY_INIT_R
9 select RAM
10 select SPL_RAM if SPL
11 imply CPU
12 imply CPU_RISCV
13 imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
14 imply SPL_SIFIVE_CLINT
15 imply CMD_CPU
16 imply SPL_CPU
17 imply SPL_OPENSBI
18 imply SPL_LOAD_FIT
19 imply SMP
20 imply CLK_SIFIVE
21 imply CLK_SIFIVE_PRCI
22 imply SIFIVE_SERIAL
23 imply MACB
24 imply MII
25 imply SPI
26 imply SPI_SIFIVE
27 imply MMC
28 imply MMC_SPI
29 imply MMC_BROKEN_CD
30 imply CMD_MMC
31 imply DM_GPIO
32 imply SIFIVE_GPIO
33 imply CMD_GPIO
34 imply MISC
35 imply SIFIVE_OTP
36 imply DM_PWM
37 imply PWM_SIFIVE
Zong Lie2172aa2021-06-30 23:23:46 +080038 imply DM_I2C
39 imply SYS_I2C_OCORES
Zong Li564d6302021-06-30 23:23:47 +080040 imply SPL_I2C_SUPPORT