blob: 611fa4bcf99413fa63e6b2c4400191f3e4edbc9a [file] [log] [blame]
Kumar Gala572b13a2008-01-16 09:11:53 -06001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Kumar Gala572b13a2008-01-16 09:11:53 -06008 */
9
10#include <common.h>
11#include <asm/fsl_law.h>
12#include <asm/mmu.h>
13
14/*
15 * LAW(Local Access Window) configuration:
16 *
17 * 0x0000_0000 0x7fff_ffff DDR 2G
18 * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
19 * 0xc000_0000 0xdfff_ffff RapidIO 512M
20 * 0xe000_0000 0xe000_ffff CCSR 1M
21 * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M
22 * 0xf000_0000 0xf7ff_ffff SDRAM 128M
23 * 0xfc00_0000 0xfc00_ffff Config Latch 64K
24 * 0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
25 *
26 * Notes:
27 * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
28 * If flash is 8M at default position (last 8M), no LAW needed.
29 */
30
31struct law_entry law_table[] = {
32#ifndef CONFIG_SPD_EEPROM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033 SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR),
Kumar Gala572b13a2008-01-16 09:11:53 -060034#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035 SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
Kumar Gala572b13a2008-01-16 09:11:53 -060036 /* This is not so much the SDRAM map as it is the whole localbus map. */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
38 SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI),
Kumar Gala002741a2009-09-19 11:20:54 -050039 SET_LAW(CONFIG_SYS_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
Kumar Gala572b13a2008-01-16 09:11:53 -060040};
41
42int num_law_entries = ARRAY_SIZE(law_table);