blob: 9b24dc535c04797a260a8604a24733ee62d81a44 [file] [log] [blame]
Simon Guinotd5cc3f52013-06-18 15:14:49 +02001/*
2 * cpld-gpio-bus.c: provides support for the CPLD GPIO bus found on some LaCie
3 * boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO
4 * bus exposes two registers (address and data). Each of this register is made
5 * up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that
6 * the registers have been updated.
7 *
8 * Mostly this bus is used to configure the LEDs on LaCie boards.
9 *
10 * Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
11 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Simon Guinotd5cc3f52013-06-18 15:14:49 +020013 */
14
15#include <asm/arch/gpio.h>
16#include "cpld-gpio-bus.h"
17
18static void cpld_gpio_bus_set_addr(struct cpld_gpio_bus *bus, unsigned addr)
19{
20 int pin;
21
22 for (pin = 0; pin < bus->num_addr; pin++)
23 kw_gpio_set_value(bus->addr[pin], (addr >> pin) & 1);
24}
25
26static void cpld_gpio_bus_set_data(struct cpld_gpio_bus *bus, unsigned data)
27{
28 int pin;
29
30 for (pin = 0; pin < bus->num_data; pin++)
31 kw_gpio_set_value(bus->data[pin], (data >> pin) & 1);
32}
33
34static void cpld_gpio_bus_enable_select(struct cpld_gpio_bus *bus)
35{
36 /* The transfer is enabled on the raising edge. */
37 kw_gpio_set_value(bus->enable, 0);
38 kw_gpio_set_value(bus->enable, 1);
39}
40
41void cpld_gpio_bus_write(struct cpld_gpio_bus *bus,
42 unsigned addr, unsigned value)
43{
44 cpld_gpio_bus_set_addr(bus, addr);
45 cpld_gpio_bus_set_data(bus, value);
46 cpld_gpio_bus_enable_select(bus);
47}