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Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +01001/*
Markus Klotzbuecher552fc622006-03-20 20:19:37 +01002 * (C) Copyright 2006 DENX Software Engineering
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +01003 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Wolfgang Denk951a9542006-03-06 23:18:48 +010014 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010015 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <config.h>
24#include <version.h>
25#include <asm/arch/pxa-regs.h>
26
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020027DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010028
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010029.macro wait time
Wolfgang Denk951a9542006-03-06 23:18:48 +010030 ldr r2, =OSCR
31 mov r3, #0
32 str r3, [r2]
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100330:
Wolfgang Denk951a9542006-03-06 23:18:48 +010034 ldr r3, [r2]
35 cmp r3, \time
36 bls 0b
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010037.endm
Markus Klotzbücher48b62422006-02-22 00:06:01 +010038
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010039.globl lowlevel_init
40lowlevel_init:
Markus Klotzbuecher552fc622006-03-20 20:19:37 +010041 /* Set up GPIO pins first */
Wolfgang Denk951a9542006-03-06 23:18:48 +010042 mov r10, lr
43
44 /* Configure GPIO Pins 97, 98 UART1 / altern. Fkt. 1 */
Markus Klotzbücher48b62422006-02-22 00:06:01 +010045 ldr r0, =GPIO97
46 ldr r1, =0x801
47 str r1, [r0]
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010048
Markus Klotzbücher48b62422006-02-22 00:06:01 +010049 ldr r0, =GPIO98
50 ldr r1, =0x801
51 str r1, [r0]
Wolfgang Denk951a9542006-03-06 23:18:48 +010052
53 /* tebrandt - ASCR, clear the RDH bit */
54 ldr r0, =ASCR
55 ldr r1, [r0]
56 bic r1, r1, #0x80000000
57 str r1, [r0]
58
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +010059mem_init:
Markus Klotzbücher48b62422006-02-22 00:06:01 +010060 /* Configure ACCR Register - enable DMEMC Clock at 260 / 2 MHz */
61 ldr r0, =ACCR
62 ldr r1, [r0]
63 orr r1, r1, #0x3000
64 str r1, [r0]
65 ldr r1, [r0]
66
67 /* 2. Programm MDCNFG, leaving DMCEN de-asserted */
68 ldr r0, =MDCNFG
69 ldr r1, =(MDCNFG_DMAP | MDCNFG_DTYPE | MDCNFG_DTC_2 | MDCNFG_DCSE0 | MDCNFG_DRAC_13)
Markus Klotzbuecher552fc622006-03-20 20:19:37 +010070 /* ldr r1, =0x80000403 */
Markus Klotzbücher48b62422006-02-22 00:06:01 +010071 str r1, [r0]
72 ldr r1, [r0] /* delay until written */
73
Wolfgang Denk951a9542006-03-06 23:18:48 +010074 /* 3. wait nop power up waiting period (200ms)
Markus Klotzbücher48b62422006-02-22 00:06:01 +010075 * optimization: Steps 4+6 can be done during this
76 */
Wolfgang Denk34290712009-01-27 22:07:14 +010077 wait #0x300
Markus Klotzbücher48b62422006-02-22 00:06:01 +010078
79 /* 4. Perform an initial Rcomp-calibration cycle */
80 ldr r0, =RCOMP
81 ldr r1, =0x80000000
82 str r1, [r0]
83 ldr r1, [r0] /* delay until written */
84 /* missing: program for automatic rcomp evaluation cycles */
85
86 /* 5. DDR DRAM strobe delay calibration */
87 ldr r0, =DDR_HCAL
88 ldr r1, =0x88000007
89 str r1, [r0]
90 wait #5
91 ldr r1, [r0] /* delay until written */
92
93 /* Set MDMRS */
94 ldr r0, =MDMRS
Markus Klotzbücherff3c2a92006-02-22 14:05:44 +010095 ldr r1, =0x60000033
Markus Klotzbücher48b62422006-02-22 00:06:01 +010096 str r1, [r0]
97 wait #300
Wolfgang Denk951a9542006-03-06 23:18:48 +010098
Markus Klotzbücher48b62422006-02-22 00:06:01 +010099 /* Configure MDREFR */
100 ldr r0, =MDREFR
101 ldr r1, =0x00000006
102 str r1, [r0]
103 ldr r1, [r0]
104
105 /* Enable the dynamic memory controller */
106 ldr r0, =MDCNFG
107 ldr r1, [r0]
108 orr r1, r1, #MDCNFG_DMCEN
109 str r1, [r0]
110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#ifndef CONFIG_SYS_SKIP_DRAM_SCRUB
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100112 /* scrub/init SDRAM if enabled/present */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113 ldr r8, =CONFIG_SYS_DRAM_BASE /* base address of SDRAM (CONFIG_SYS_DRAM_BASE) */
114 ldr r9, =CONFIG_SYS_DRAM_SIZE /* size of memory to scrub (CONFIG_SYS_DRAM_SIZE) */
Markus Klotzbücherff3c2a92006-02-22 14:05:44 +0100115 mov r0, #0 /* scrub with 0x0000:0000 */
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100116 mov r1, #0
Wolfgang Denk951a9542006-03-06 23:18:48 +0100117 mov r2, #0
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100118 mov r3, #0
Wolfgang Denk951a9542006-03-06 23:18:48 +0100119 mov r4, #0
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100120 mov r5, #0
Wolfgang Denk951a9542006-03-06 23:18:48 +0100121 mov r6, #0
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100122 mov r7, #0
Wolfgang Denk951a9542006-03-06 23:18:48 +010012310: /* fastScrubLoop */
Markus Klotzbücherff3c2a92006-02-22 14:05:44 +0100124 subs r9, r9, #32 /* 8 words/line */
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100125 stmia r8!, {r0-r7}
126 beq 15f
127 b 10b
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#endif /* CONFIG_SYS_SKIP_DRAM_SCRUB */
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100129
13015:
131 /* Mask all interrupts */
132 mov r1, #0
133 mcr p6, 0, r1, c1, c0, 0 @ ICMR
134
135 /* Disable software and data breakpoints */
136 mov r0, #0
Wolfgang Denk951a9542006-03-06 23:18:48 +0100137 mcr p15,0,r0,c14,c8,0 /* ibcr0 */
138 mcr p15,0,r0,c14,c9,0 /* ibcr1 */
139 mcr p15,0,r0,c14,c4,0 /* dbcon */
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100140
141 /* Enable all debug functionality */
142 mov r0,#0x80000000
Wolfgang Denk951a9542006-03-06 23:18:48 +0100143 mcr p14,0,r0,c10,c0,0 /* dcsr */
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100144
Markus Klotzbücher4f7a0e32006-02-20 16:37:37 +0100145endlowlevel_init:
Wolfgang Denk951a9542006-03-06 23:18:48 +0100146 mov pc, lr