Philippe Reynes | 341032d | 2018-07-16 19:06:14 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com> |
| 4 | */ |
| 5 | |
| 6 | #include "skeleton.dtsi" |
| 7 | |
| 8 | / { |
| 9 | compatible = "brcm,bcm6838"; |
| 10 | |
| 11 | cpus { |
| 12 | reg = <0x14e00000 0x4>; |
| 13 | #address-cells = <1>; |
| 14 | #size-cells = <0>; |
| 15 | u-boot,dm-pre-reloc; |
| 16 | |
| 17 | cpu@0 { |
| 18 | compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; |
| 19 | device_type = "cpu"; |
| 20 | reg = <0>; |
| 21 | u-boot,dm-pre-reloc; |
| 22 | }; |
| 23 | |
| 24 | cpu@1 { |
| 25 | compatible = "brcm,bcm6838-cpu", "mips,mips4Kc"; |
| 26 | device_type = "cpu"; |
| 27 | reg = <1>; |
| 28 | u-boot,dm-pre-reloc; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | clocks { |
| 33 | compatible = "simple-bus"; |
| 34 | #address-cells = <1>; |
| 35 | #size-cells = <1>; |
| 36 | u-boot,dm-pre-reloc; |
| 37 | |
| 38 | periph_osc: periph-osc { |
| 39 | compatible = "fixed-clock"; |
| 40 | #clock-cells = <0>; |
| 41 | clock-frequency = <50000000>; |
| 42 | u-boot,dm-pre-reloc; |
| 43 | }; |
| 44 | }; |
| 45 | |
| 46 | ubus { |
| 47 | compatible = "simple-bus"; |
| 48 | #address-cells = <1>; |
| 49 | #size-cells = <1>; |
| 50 | u-boot,dm-pre-reloc; |
| 51 | |
| 52 | memory: memory-controller@12000000 { |
| 53 | compatible = "brcm,bcm6328-mc"; |
| 54 | reg = <0x12000000 0x1000>; |
| 55 | u-boot,dm-pre-reloc; |
| 56 | }; |
| 57 | |
Philippe Reynes | e98a260 | 2018-08-13 14:23:08 +0200 | [diff] [blame] | 58 | gpio_test_port: syscon@14e00294 { |
| 59 | compatible = "syscon"; |
| 60 | reg = <0x14e00294 0x1c>; |
| 61 | }; |
| 62 | |
| 63 | pinctrl: pinctrl { |
| 64 | compatible = "brcm,bcm6838-pinctrl"; |
| 65 | regmap = <&gpio_test_port>; |
| 66 | brcm,pins-count = <74>; |
| 67 | brcm,functions-count = <8>; |
| 68 | }; |
| 69 | |
Philippe Reynes | 341032d | 2018-07-16 19:06:14 +0200 | [diff] [blame] | 70 | uart0: serial@14e00500 { |
| 71 | compatible = "brcm,bcm6345-uart"; |
| 72 | reg = <0x14e00500 0x18>; |
| 73 | clocks = <&periph_osc>; |
| 74 | |
| 75 | status = "disabled"; |
| 76 | }; |
| 77 | |
| 78 | leds: led-controller@14e00f00 { |
| 79 | compatible = "brcm,bcm6328-leds"; |
| 80 | reg = <0x14e00f00 0x28>; |
| 81 | #address-cells = <1>; |
| 82 | #size-cells = <0>; |
| 83 | |
| 84 | status = "disabled"; |
| 85 | }; |
| 86 | }; |
| 87 | }; |