| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | / { |
| 4 | description = "U-Boot mainline"; |
| 5 | #address-cells = <1>; |
| 6 | |
| 7 | images { |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 8 | kernel { |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 9 | description = "U-Boot mainline"; |
| 10 | type = "kernel_noload"; |
| 11 | arch = "arm"; |
| 12 | os = "linux"; |
| 13 | data = /incbin/("../.././b/nyan-big/u-boot.bin"); |
| 14 | compression = "none"; |
| 15 | load = <0>; |
| 16 | entry = <0>; |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 17 | hash-2 { |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 18 | algo = "sha1"; |
| 19 | }; |
| 20 | }; |
| 21 | |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 22 | fdt-1{ |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 23 | description = "tegra124-nyan-big.dtb"; |
| 24 | data = /incbin/("../.././b/nyan-big/u-boot.dtb"); |
| 25 | type = "flat_dt"; |
| 26 | arch = "arm"; |
| 27 | compression = "none"; |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 28 | hash-1{ |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 29 | algo = "sha1"; |
| 30 | }; |
| 31 | }; |
| 32 | }; |
| 33 | |
| 34 | configurations { |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 35 | default = "config-1"; |
| 36 | config-1 { |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 37 | description = "Boot U-Boot"; |
| Andre Przywara | 971a541 | 2017-12-04 02:05:09 +0000 | [diff] [blame] | 38 | kernel = "kernel"; |
| 39 | fdt = "fdt-1"; |
| Simon Glass | 13bdce8 | 2017-05-31 17:57:23 -0600 | [diff] [blame] | 40 | }; |
| 41 | }; |
| 42 | }; |