Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010 |
| 4 | * Marvell Semiconductor <www.marvell.com> |
| 5 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 6 | * Contributor: Mahavir Jain <mjain@marvell.com> |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_ASPENITE_H |
| 10 | #define __CONFIG_ASPENITE_H |
| 11 | |
| 12 | /* |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 13 | * High Level Configuration Options |
| 14 | */ |
| 15 | #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ |
| 16 | #define CONFIG_ARMADA100 1 /* SOC Family Name */ |
| 17 | #define CONFIG_ARMADA168 1 /* SOC Used on this Board */ |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 18 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
| 19 | |
| 20 | /* |
Lei Wen | cf946c6 | 2011-02-09 18:06:58 +0530 | [diff] [blame] | 21 | * There is no internal RAM in ARMADA100, using DRAM |
| 22 | * TBD: dcache to be used for this |
| 23 | */ |
| 24 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) |
Lei Wen | cf946c6 | 2011-02-09 18:06:58 +0530 | [diff] [blame] | 25 | |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 26 | #include "mv-common.h" |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 27 | |
| 28 | /* |
| 29 | * Environment variables configurations |
| 30 | */ |
Prafulla Wadaskar | c291e2f | 2010-11-29 17:01:27 +0530 | [diff] [blame] | 31 | |
| 32 | #endif /* __CONFIG_ASPENITE_H */ |