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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 83d290c56fab2d38cd1ab4c4cc7099559c1d5046 / . / arch / arm / dts / r8a7791.dtsi
blob: dd21fde19367ee44c7526f0c9cacacc006b2560a [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
Marek Vasutedd15fc2018-01-07 20:17:39 +0100[diff] [blame]2/*
3 * Device Tree Source for the r8a7791 SoC
4 *
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
Marek Vasutedd15fc2018-01-07 20:17:39 +0100[diff] [blame]8 */
9
10#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7791-sysc.h>
14
15/ {
16 compatible = "renesas,r8a7791";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 i2c3 = &i2c3;
26 i2c4 = &i2c4;
27 i2c5 = &i2c5;
28 i2c6 = &i2c6;
29 i2c7 = &i2c7;
30 i2c8 = &i2c8;
31 spi0 = &qspi;
32 spi1 = &msiof0;
33 spi2 = &msiof1;
34 spi3 = &msiof2;
35 vin0 = &vin0;
36 vin1 = &vin1;
37 vin2 = &vin2;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 enable-method = "renesas,apmu";
44
45 cpu0: cpu@0 {
46 device_type = "cpu";
47 compatible = "arm,cortex-a15";
48 reg = <0>;
49 clock-frequency = <1500000000>;
50 voltage-tolerance = <1>; /* 1% */
51 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
52 clock-latency = <300000>; /* 300 us */
53 power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
54 next-level-cache = <&L2_CA15>;
55
56 /* kHz - uV - OPPs unknown yet */
57 operating-points = <1500000 1000000>,
58 <1312500 1000000>,
59 <1125000 1000000>,
60 < 937500 1000000>,
61 < 750000 1000000>,
62 < 375000 1000000>;
63 };
64
65 cpu1: cpu@1 {
66 device_type = "cpu";
67 compatible = "arm,cortex-a15";
68 reg = <1>;
69 clock-frequency = <1500000000>;
70 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
71 power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
72 next-level-cache = <&L2_CA15>;
73 };
74
75 L2_CA15: cache-controller-0 {
76 compatible = "cache";
77 power-domains = <&sysc R8A7791_PD_CA15_SCU>;
78 cache-unified;
79 cache-level = <2>;
80 };
81 };
82
83 thermal-zones {
84 cpu_thermal: cpu-thermal {
85 polling-delay-passive = <0>;
86 polling-delay = <0>;
87
88 thermal-sensors = <&thermal>;
89
90 trips {
91 cpu-crit {
92 temperature = <115000>;
93 hysteresis = <0>;
94 type = "critical";
95 };
96 };
97 cooling-maps {
98 };
99 };
100 };
101
102 apmu@e6152000 {
103 compatible = "renesas,r8a7791-apmu", "renesas,apmu";
104 reg = <0 0xe6152000 0 0x188>;
105 cpus = <&cpu0 &cpu1>;
106 };
107
108 gic: interrupt-controller@f1001000 {
109 compatible = "arm,gic-400";
110 #interrupt-cells = <3>;
111 #address-cells = <0>;
112 interrupt-controller;
113 reg = <0 0xf1001000 0 0x1000>,
114 <0 0xf1002000 0 0x2000>,
115 <0 0xf1004000 0 0x2000>,
116 <0 0xf1006000 0 0x2000>;
117 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
118 clocks = <&cpg CPG_MOD 408>;
119 clock-names = "clk";
120 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
121 resets = <&cpg 408>;
122 };
123
124 gpio0: gpio@e6050000 {
125 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
126 reg = <0 0xe6050000 0 0x50>;
127 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
128 #gpio-cells = <2>;
129 gpio-controller;
130 gpio-ranges = <&pfc 0 0 32>;
131 #interrupt-cells = <2>;
132 interrupt-controller;
133 clocks = <&cpg CPG_MOD 912>;
134 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
135 resets = <&cpg 912>;
136 };
137
138 gpio1: gpio@e6051000 {
139 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
140 reg = <0 0xe6051000 0 0x50>;
141 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
142 #gpio-cells = <2>;
143 gpio-controller;
144 gpio-ranges = <&pfc 0 32 26>;
145 #interrupt-cells = <2>;
146 interrupt-controller;
147 clocks = <&cpg CPG_MOD 911>;
148 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
149 resets = <&cpg 911>;
150 };
151
152 gpio2: gpio@e6052000 {
153 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
154 reg = <0 0xe6052000 0 0x50>;
155 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
156 #gpio-cells = <2>;
157 gpio-controller;
158 gpio-ranges = <&pfc 0 64 32>;
159 #interrupt-cells = <2>;
160 interrupt-controller;
161 clocks = <&cpg CPG_MOD 910>;
162 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
163 resets = <&cpg 910>;
164 };
165
166 gpio3: gpio@e6053000 {
167 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
168 reg = <0 0xe6053000 0 0x50>;
169 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
170 #gpio-cells = <2>;
171 gpio-controller;
172 gpio-ranges = <&pfc 0 96 32>;
173 #interrupt-cells = <2>;
174 interrupt-controller;
175 clocks = <&cpg CPG_MOD 909>;
176 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
177 resets = <&cpg 909>;
178 };
179
180 gpio4: gpio@e6054000 {
181 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
182 reg = <0 0xe6054000 0 0x50>;
183 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 128 32>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
189 clocks = <&cpg CPG_MOD 908>;
190 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
191 resets = <&cpg 908>;
192 };
193
194 gpio5: gpio@e6055000 {
195 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
196 reg = <0 0xe6055000 0 0x50>;
197 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
198 #gpio-cells = <2>;
199 gpio-controller;
200 gpio-ranges = <&pfc 0 160 32>;
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 clocks = <&cpg CPG_MOD 907>;
204 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
205 resets = <&cpg 907>;
206 };
207
208 gpio6: gpio@e6055400 {
209 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
210 reg = <0 0xe6055400 0 0x50>;
211 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
212 #gpio-cells = <2>;
213 gpio-controller;
214 gpio-ranges = <&pfc 0 192 32>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 905>;
218 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
219 resets = <&cpg 905>;
220 };
221
222 gpio7: gpio@e6055800 {
223 compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
224 reg = <0 0xe6055800 0 0x50>;
225 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 224 26>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 clocks = <&cpg CPG_MOD 904>;
232 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
233 resets = <&cpg 904>;
234 };
235
236 thermal: thermal@e61f0000 {
237 compatible = "renesas,thermal-r8a7791",
238 "renesas,rcar-gen2-thermal",
239 "renesas,rcar-thermal";
240 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
241 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
242 clocks = <&cpg CPG_MOD 522>;
243 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
244 resets = <&cpg 522>;
245 #thermal-sensor-cells = <0>;
246 };
247
248 timer {
249 compatible = "arm,armv7-timer";
250 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
251 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
252 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
253 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
254 };
255
256 cmt0: timer@ffca0000 {
257 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
258 reg = <0 0xffca0000 0 0x1004>;
259 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
260 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
261 clocks = <&cpg CPG_MOD 124>;
262 clock-names = "fck";
263 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
264 resets = <&cpg 124>;
265
266 renesas,channels-mask = <0x60>;
267
268 status = "disabled";
269 };
270
271 cmt1: timer@e6130000 {
272 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
273 reg = <0 0xe6130000 0 0x1004>;
274 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
275 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
282 clocks = <&cpg CPG_MOD 329>;
283 clock-names = "fck";
284 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
285 resets = <&cpg 329>;
286
287 renesas,channels-mask = <0xff>;
288
289 status = "disabled";
290 };
291
292 irqc0: interrupt-controller@e61c0000 {
293 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
294 #interrupt-cells = <2>;
295 interrupt-controller;
296 reg = <0 0xe61c0000 0 0x200>;
297 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
299 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
300 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
302 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
306 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&cpg CPG_MOD 407>;
308 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
309 resets = <&cpg 407>;
310 };
311
312 dmac0: dma-controller@e6700000 {
313 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
314 reg = <0 0xe6700000 0 0x20000>;
315 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
319 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
320 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
321 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
331 interrupt-names = "error",
332 "ch0", "ch1", "ch2", "ch3",
333 "ch4", "ch5", "ch6", "ch7",
334 "ch8", "ch9", "ch10", "ch11",
335 "ch12", "ch13", "ch14";
336 clocks = <&cpg CPG_MOD 219>;
337 clock-names = "fck";
338 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
339 resets = <&cpg 219>;
340 #dma-cells = <1>;
341 dma-channels = <15>;
342 };
343
344 dmac1: dma-controller@e6720000 {
345 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
346 reg = <0 0xe6720000 0 0x20000>;
347 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
363 interrupt-names = "error",
364 "ch0", "ch1", "ch2", "ch3",
365 "ch4", "ch5", "ch6", "ch7",
366 "ch8", "ch9", "ch10", "ch11",
367 "ch12", "ch13", "ch14";
368 clocks = <&cpg CPG_MOD 218>;
369 clock-names = "fck";
370 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
371 resets = <&cpg 218>;
372 #dma-cells = <1>;
373 dma-channels = <15>;
374 };
375
376 audma0: dma-controller@ec700000 {
377 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
378 reg = <0 0xec700000 0 0x10000>;
379 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
393 interrupt-names = "error",
394 "ch0", "ch1", "ch2", "ch3",
395 "ch4", "ch5", "ch6", "ch7",
396 "ch8", "ch9", "ch10", "ch11",
397 "ch12";
398 clocks = <&cpg CPG_MOD 502>;
399 clock-names = "fck";
400 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
401 resets = <&cpg 502>;
402 #dma-cells = <1>;
403 dma-channels = <13>;
404 };
405
406 audma1: dma-controller@ec720000 {
407 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
408 reg = <0 0xec720000 0 0x10000>;
409 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
410 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
412 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
413 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
416 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
423 interrupt-names = "error",
424 "ch0", "ch1", "ch2", "ch3",
425 "ch4", "ch5", "ch6", "ch7",
426 "ch8", "ch9", "ch10", "ch11",
427 "ch12";
428 clocks = <&cpg CPG_MOD 501>;
429 clock-names = "fck";
430 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
431 resets = <&cpg 501>;
432 #dma-cells = <1>;
433 dma-channels = <13>;
434 };
435
436 usb_dmac0: dma-controller@e65a0000 {
437 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
438 reg = <0 0xe65a0000 0 0x100>;
439 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
441 interrupt-names = "ch0", "ch1";
442 clocks = <&cpg CPG_MOD 330>;
443 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
444 resets = <&cpg 330>;
445 #dma-cells = <1>;
446 dma-channels = <2>;
447 };
448
449 usb_dmac1: dma-controller@e65b0000 {
450 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
451 reg = <0 0xe65b0000 0 0x100>;
452 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
453 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
454 interrupt-names = "ch0", "ch1";
455 clocks = <&cpg CPG_MOD 331>;
456 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
457 resets = <&cpg 331>;
458 #dma-cells = <1>;
459 dma-channels = <2>;
460 };
461
462 /* The memory map in the User's Manual maps the cores to bus numbers */
463 i2c0: i2c@e6508000 {
464 #address-cells = <1>;
465 #size-cells = <0>;
466 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
467 reg = <0 0xe6508000 0 0x40>;
468 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
469 clocks = <&cpg CPG_MOD 931>;
470 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
471 resets = <&cpg 931>;
472 i2c-scl-internal-delay-ns = <6>;
473 status = "disabled";
474 };
475
476 i2c1: i2c@e6518000 {
477 #address-cells = <1>;
478 #size-cells = <0>;
479 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
480 reg = <0 0xe6518000 0 0x40>;
481 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 930>;
483 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
484 resets = <&cpg 930>;
485 i2c-scl-internal-delay-ns = <6>;
486 status = "disabled";
487 };
488
489 i2c2: i2c@e6530000 {
490 #address-cells = <1>;
491 #size-cells = <0>;
492 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
493 reg = <0 0xe6530000 0 0x40>;
494 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&cpg CPG_MOD 929>;
496 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
497 resets = <&cpg 929>;
498 i2c-scl-internal-delay-ns = <6>;
499 status = "disabled";
500 };
501
502 i2c3: i2c@e6540000 {
503 #address-cells = <1>;
504 #size-cells = <0>;
505 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
506 reg = <0 0xe6540000 0 0x40>;
507 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&cpg CPG_MOD 928>;
509 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
510 resets = <&cpg 928>;
511 i2c-scl-internal-delay-ns = <6>;
512 status = "disabled";
513 };
514
515 i2c4: i2c@e6520000 {
516 #address-cells = <1>;
517 #size-cells = <0>;
518 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
519 reg = <0 0xe6520000 0 0x40>;
520 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
521 clocks = <&cpg CPG_MOD 927>;
522 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
523 resets = <&cpg 927>;
524 i2c-scl-internal-delay-ns = <6>;
525 status = "disabled";
526 };
527
528 i2c5: i2c@e6528000 {
529 /* doesn't need pinmux */
530 #address-cells = <1>;
531 #size-cells = <0>;
532 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
533 reg = <0 0xe6528000 0 0x40>;
534 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
535 clocks = <&cpg CPG_MOD 925>;
536 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
537 resets = <&cpg 925>;
538 i2c-scl-internal-delay-ns = <110>;
539 status = "disabled";
540 };
541
542 i2c6: i2c@e60b0000 {
543 /* doesn't need pinmux */
544 #address-cells = <1>;
545 #size-cells = <0>;
546 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
547 "renesas,rmobile-iic";
548 reg = <0 0xe60b0000 0 0x425>;
549 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
550 clocks = <&cpg CPG_MOD 926>;
551 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
552 <&dmac1 0x77>, <&dmac1 0x78>;
553 dma-names = "tx", "rx", "tx", "rx";
554 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
555 resets = <&cpg 926>;
556 status = "disabled";
557 };
558
559 i2c7: i2c@e6500000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
563 "renesas,rmobile-iic";
564 reg = <0 0xe6500000 0 0x425>;
565 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&cpg CPG_MOD 318>;
567 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
568 <&dmac1 0x61>, <&dmac1 0x62>;
569 dma-names = "tx", "rx", "tx", "rx";
570 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
571 resets = <&cpg 318>;
572 status = "disabled";
573 };
574
575 i2c8: i2c@e6510000 {
576 #address-cells = <1>;
577 #size-cells = <0>;
578 compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
579 "renesas,rmobile-iic";
580 reg = <0 0xe6510000 0 0x425>;
581 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
582 clocks = <&cpg CPG_MOD 323>;
583 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
584 <&dmac1 0x65>, <&dmac1 0x66>;
585 dma-names = "tx", "rx", "tx", "rx";
586 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
587 resets = <&cpg 323>;
588 status = "disabled";
589 };
590
591 pfc: pin-controller@e6060000 {
592 compatible = "renesas,pfc-r8a7791";
593 reg = <0 0xe6060000 0 0x250>;
594 };
595
596 mmcif0: mmc@ee200000 {
597 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
598 reg = <0 0xee200000 0 0x80>;
599 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
600 clocks = <&cpg CPG_MOD 315>;
601 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
602 <&dmac1 0xd1>, <&dmac1 0xd2>;
603 dma-names = "tx", "rx", "tx", "rx";
604 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
605 resets = <&cpg 315>;
606 reg-io-width = <4>;
607 status = "disabled";
608 max-frequency = <97500000>;
609 };
610
611 sdhi0: sd@ee100000 {
612 compatible = "renesas,sdhi-r8a7791";
613 reg = <0 0xee100000 0 0x328>;
614 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
615 clocks = <&cpg CPG_MOD 314>;
616 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
617 <&dmac1 0xcd>, <&dmac1 0xce>;
618 dma-names = "tx", "rx", "tx", "rx";
619 max-frequency = <195000000>;
620 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
621 resets = <&cpg 314>;
622 status = "disabled";
623 };
624
625 sdhi1: sd@ee140000 {
626 compatible = "renesas,sdhi-r8a7791";
627 reg = <0 0xee140000 0 0x100>;
628 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
629 clocks = <&cpg CPG_MOD 312>;
630 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
631 <&dmac1 0xc1>, <&dmac1 0xc2>;
632 dma-names = "tx", "rx", "tx", "rx";
633 max-frequency = <97500000>;
634 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
635 resets = <&cpg 312>;
636 status = "disabled";
637 };
638
639 sdhi2: sd@ee160000 {
640 compatible = "renesas,sdhi-r8a7791";
641 reg = <0 0xee160000 0 0x100>;
642 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
643 clocks = <&cpg CPG_MOD 311>;
644 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
645 <&dmac1 0xd3>, <&dmac1 0xd4>;
646 dma-names = "tx", "rx", "tx", "rx";
647 max-frequency = <97500000>;
648 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
649 resets = <&cpg 311>;
650 status = "disabled";
651 };
652
653 scifa0: serial@e6c40000 {
654 compatible = "renesas,scifa-r8a7791",
655 "renesas,rcar-gen2-scifa", "renesas,scifa";
656 reg = <0 0xe6c40000 0 64>;
657 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
658 clocks = <&cpg CPG_MOD 204>;
659 clock-names = "fck";
660 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
661 <&dmac1 0x21>, <&dmac1 0x22>;
662 dma-names = "tx", "rx", "tx", "rx";
663 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
664 resets = <&cpg 204>;
665 status = "disabled";
666 };
667
668 scifa1: serial@e6c50000 {
669 compatible = "renesas,scifa-r8a7791",
670 "renesas,rcar-gen2-scifa", "renesas,scifa";
671 reg = <0 0xe6c50000 0 64>;
672 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
673 clocks = <&cpg CPG_MOD 203>;
674 clock-names = "fck";
675 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
676 <&dmac1 0x25>, <&dmac1 0x26>;
677 dma-names = "tx", "rx", "tx", "rx";
678 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
679 resets = <&cpg 203>;
680 status = "disabled";
681 };
682
683 scifa2: serial@e6c60000 {
684 compatible = "renesas,scifa-r8a7791",
685 "renesas,rcar-gen2-scifa", "renesas,scifa";
686 reg = <0 0xe6c60000 0 64>;
687 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
688 clocks = <&cpg CPG_MOD 202>;
689 clock-names = "fck";
690 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
691 <&dmac1 0x27>, <&dmac1 0x28>;
692 dma-names = "tx", "rx", "tx", "rx";
693 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
694 resets = <&cpg 202>;
695 status = "disabled";
696 };
697
698 scifa3: serial@e6c70000 {
699 compatible = "renesas,scifa-r8a7791",
700 "renesas,rcar-gen2-scifa", "renesas,scifa";
701 reg = <0 0xe6c70000 0 64>;
702 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
703 clocks = <&cpg CPG_MOD 1106>;
704 clock-names = "fck";
705 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
706 <&dmac1 0x1b>, <&dmac1 0x1c>;
707 dma-names = "tx", "rx", "tx", "rx";
708 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
709 resets = <&cpg 1106>;
710 status = "disabled";
711 };
712
713 scifa4: serial@e6c78000 {
714 compatible = "renesas,scifa-r8a7791",
715 "renesas,rcar-gen2-scifa", "renesas,scifa";
716 reg = <0 0xe6c78000 0 64>;
717 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&cpg CPG_MOD 1107>;
719 clock-names = "fck";
720 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
721 <&dmac1 0x1f>, <&dmac1 0x20>;
722 dma-names = "tx", "rx", "tx", "rx";
723 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
724 resets = <&cpg 1107>;
725 status = "disabled";
726 };
727
728 scifa5: serial@e6c80000 {
729 compatible = "renesas,scifa-r8a7791",
730 "renesas,rcar-gen2-scifa", "renesas,scifa";
731 reg = <0 0xe6c80000 0 64>;
732 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
733 clocks = <&cpg CPG_MOD 1108>;
734 clock-names = "fck";
735 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
736 <&dmac1 0x23>, <&dmac1 0x24>;
737 dma-names = "tx", "rx", "tx", "rx";
738 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
739 resets = <&cpg 1108>;
740 status = "disabled";
741 };
742
743 scifb0: serial@e6c20000 {
744 compatible = "renesas,scifb-r8a7791",
745 "renesas,rcar-gen2-scifb", "renesas,scifb";
746 reg = <0 0xe6c20000 0 0x100>;
747 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
748 clocks = <&cpg CPG_MOD 206>;
749 clock-names = "fck";
750 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
751 <&dmac1 0x3d>, <&dmac1 0x3e>;
752 dma-names = "tx", "rx", "tx", "rx";
753 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
754 resets = <&cpg 206>;
755 status = "disabled";
756 };
757
758 scifb1: serial@e6c30000 {
759 compatible = "renesas,scifb-r8a7791",
760 "renesas,rcar-gen2-scifb", "renesas,scifb";
761 reg = <0 0xe6c30000 0 0x100>;
762 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
763 clocks = <&cpg CPG_MOD 207>;
764 clock-names = "fck";
765 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
766 <&dmac1 0x19>, <&dmac1 0x1a>;
767 dma-names = "tx", "rx", "tx", "rx";
768 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
769 resets = <&cpg 207>;
770 status = "disabled";
771 };
772
773 scifb2: serial@e6ce0000 {
774 compatible = "renesas,scifb-r8a7791",
775 "renesas,rcar-gen2-scifb", "renesas,scifb";
776 reg = <0 0xe6ce0000 0 0x100>;
777 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
778 clocks = <&cpg CPG_MOD 216>;
779 clock-names = "fck";
780 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
781 <&dmac1 0x1d>, <&dmac1 0x1e>;
782 dma-names = "tx", "rx", "tx", "rx";
783 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
784 resets = <&cpg 216>;
785 status = "disabled";
786 };
787
788 scif0: serial@e6e60000 {
789 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
790 "renesas,scif";
791 reg = <0 0xe6e60000 0 64>;
792 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
793 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
794 <&scif_clk>;
795 clock-names = "fck", "brg_int", "scif_clk";
796 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
797 <&dmac1 0x29>, <&dmac1 0x2a>;
798 dma-names = "tx", "rx", "tx", "rx";
799 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
800 resets = <&cpg 721>;
801 status = "disabled";
802 };
803
804 scif1: serial@e6e68000 {
805 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
806 "renesas,scif";
807 reg = <0 0xe6e68000 0 64>;
808 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
809 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
810 <&scif_clk>;
811 clock-names = "fck", "brg_int", "scif_clk";
812 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
813 <&dmac1 0x2d>, <&dmac1 0x2e>;
814 dma-names = "tx", "rx", "tx", "rx";
815 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
816 resets = <&cpg 720>;
817 status = "disabled";
818 };
819
820 adc: adc@e6e54000 {
821 compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
822 reg = <0 0xe6e54000 0 64>;
823 clocks = <&cpg CPG_MOD 901>;
824 clock-names = "fck";
825 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
826 resets = <&cpg 901>;
827 status = "disabled";
828 };
829
830 scif2: serial@e6e58000 {
831 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
832 "renesas,scif";
833 reg = <0 0xe6e58000 0 64>;
834 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
835 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
836 <&scif_clk>;
837 clock-names = "fck", "brg_int", "scif_clk";
838 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
839 <&dmac1 0x2b>, <&dmac1 0x2c>;
840 dma-names = "tx", "rx", "tx", "rx";
841 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
842 resets = <&cpg 719>;
843 status = "disabled";
844 };
845
846 scif3: serial@e6ea8000 {
847 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
848 "renesas,scif";
849 reg = <0 0xe6ea8000 0 64>;
850 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
851 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
852 <&scif_clk>;
853 clock-names = "fck", "brg_int", "scif_clk";
854 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
855 <&dmac1 0x2f>, <&dmac1 0x30>;
856 dma-names = "tx", "rx", "tx", "rx";
857 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
858 resets = <&cpg 718>;
859 status = "disabled";
860 };
861
862 scif4: serial@e6ee0000 {
863 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
864 "renesas,scif";
865 reg = <0 0xe6ee0000 0 64>;
866 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
868 <&scif_clk>;
869 clock-names = "fck", "brg_int", "scif_clk";
870 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
871 <&dmac1 0xfb>, <&dmac1 0xfc>;
872 dma-names = "tx", "rx", "tx", "rx";
873 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
874 resets = <&cpg 715>;
875 status = "disabled";
876 };
877
878 scif5: serial@e6ee8000 {
879 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
880 "renesas,scif";
881 reg = <0 0xe6ee8000 0 64>;
882 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
883 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
884 <&scif_clk>;
885 clock-names = "fck", "brg_int", "scif_clk";
886 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
887 <&dmac1 0xfd>, <&dmac1 0xfe>;
888 dma-names = "tx", "rx", "tx", "rx";
889 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
890 resets = <&cpg 714>;
891 status = "disabled";
892 };
893
894 hscif0: serial@e62c0000 {
895 compatible = "renesas,hscif-r8a7791",
896 "renesas,rcar-gen2-hscif", "renesas,hscif";
897 reg = <0 0xe62c0000 0 96>;
898 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
899 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
900 <&scif_clk>;
901 clock-names = "fck", "brg_int", "scif_clk";
902 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
903 <&dmac1 0x39>, <&dmac1 0x3a>;
904 dma-names = "tx", "rx", "tx", "rx";
905 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
906 resets = <&cpg 717>;
907 status = "disabled";
908 };
909
910 hscif1: serial@e62c8000 {
911 compatible = "renesas,hscif-r8a7791",
912 "renesas,rcar-gen2-hscif", "renesas,hscif";
913 reg = <0 0xe62c8000 0 96>;
914 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
915 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
916 <&scif_clk>;
917 clock-names = "fck", "brg_int", "scif_clk";
918 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
919 <&dmac1 0x4d>, <&dmac1 0x4e>;
920 dma-names = "tx", "rx", "tx", "rx";
921 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
922 resets = <&cpg 716>;
923 status = "disabled";
924 };
925
926 hscif2: serial@e62d0000 {
927 compatible = "renesas,hscif-r8a7791",
928 "renesas,rcar-gen2-hscif", "renesas,hscif";
929 reg = <0 0xe62d0000 0 96>;
930 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
931 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
932 <&scif_clk>;
933 clock-names = "fck", "brg_int", "scif_clk";
934 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
935 <&dmac1 0x3b>, <&dmac1 0x3c>;
936 dma-names = "tx", "rx", "tx", "rx";
937 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
938 resets = <&cpg 713>;
939 status = "disabled";
940 };
941
942 icram0: sram@e63a0000 {
943 compatible = "mmio-sram";
944 reg = <0 0xe63a0000 0 0x12000>;
945 };
946
947 icram1: sram@e63c0000 {
948 compatible = "mmio-sram";
949 reg = <0 0xe63c0000 0 0x1000>;
950 #address-cells = <1>;
951 #size-cells = <1>;
952 ranges = <0 0 0xe63c0000 0x1000>;
953
954 smp-sram@0 {
955 compatible = "renesas,smp-sram";
956 reg = <0 0x10>;
957 };
958 };
959
960 ether: ethernet@ee700000 {
961 compatible = "renesas,ether-r8a7791";
962 reg = <0 0xee700000 0 0x400>;
963 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
964 clocks = <&cpg CPG_MOD 813>;
965 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
966 resets = <&cpg 813>;
967 phy-mode = "rmii";
968 #address-cells = <1>;
969 #size-cells = <0>;
970 status = "disabled";
971 };
972
973 avb: ethernet@e6800000 {
974 compatible = "renesas,etheravb-r8a7791",
975 "renesas,etheravb-rcar-gen2";
976 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
977 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
978 clocks = <&cpg CPG_MOD 812>;
979 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
980 resets = <&cpg 812>;
981 #address-cells = <1>;
982 #size-cells = <0>;
983 status = "disabled";
984 };
985
986 sata0: sata@ee300000 {
987 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
988 reg = <0 0xee300000 0 0x2000>;
989 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
990 clocks = <&cpg CPG_MOD 815>;
991 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
992 resets = <&cpg 815>;
993 status = "disabled";
994 };
995
996 sata1: sata@ee500000 {
997 compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata";
998 reg = <0 0xee500000 0 0x2000>;
999 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1000 clocks = <&cpg CPG_MOD 814>;
1001 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1002 resets = <&cpg 814>;
1003 status = "disabled";
1004 };
1005
1006 hsusb: usb@e6590000 {
1007 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
1008 reg = <0 0xe6590000 0 0x100>;
1009 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1010 clocks = <&cpg CPG_MOD 704>;
1011 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1012 <&usb_dmac1 0>, <&usb_dmac1 1>;
1013 dma-names = "ch0", "ch1", "ch2", "ch3";
1014 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1015 resets = <&cpg 704>;
1016 renesas,buswait = <4>;
1017 phys = <&usb0 1>;
1018 phy-names = "usb";
1019 status = "disabled";
1020 };
1021
1022 usbphy: usb-phy@e6590100 {
1023 compatible = "renesas,usb-phy-r8a7791",
1024 "renesas,rcar-gen2-usb-phy";
1025 reg = <0 0xe6590100 0 0x100>;
1026 #address-cells = <1>;
1027 #size-cells = <0>;
1028 clocks = <&cpg CPG_MOD 704>;
1029 clock-names = "usbhs";
1030 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1031 resets = <&cpg 704>;
1032 status = "disabled";
1033
1034 usb0: usb-channel@0 {
1035 reg = <0>;
1036 #phy-cells = <1>;
1037 };
1038 usb2: usb-channel@2 {
1039 reg = <2>;
1040 #phy-cells = <1>;
1041 };
1042 };
1043
1044 vin0: video@e6ef0000 {
1045 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1046 reg = <0 0xe6ef0000 0 0x1000>;
1047 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1048 clocks = <&cpg CPG_MOD 811>;
1049 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1050 resets = <&cpg 811>;
1051 status = "disabled";
1052 };
1053
1054 vin1: video@e6ef1000 {
1055 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1056 reg = <0 0xe6ef1000 0 0x1000>;
1057 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1058 clocks = <&cpg CPG_MOD 810>;
1059 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1060 resets = <&cpg 810>;
1061 status = "disabled";
1062 };
1063
1064 vin2: video@e6ef2000 {
1065 compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin";
1066 reg = <0 0xe6ef2000 0 0x1000>;
1067 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1068 clocks = <&cpg CPG_MOD 809>;
1069 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1070 resets = <&cpg 809>;
1071 status = "disabled";
1072 };
1073
1074 vsp@fe928000 {
1075 compatible = "renesas,vsp1";
1076 reg = <0 0xfe928000 0 0x8000>;
1077 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1078 clocks = <&cpg CPG_MOD 131>;
1079 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1080 resets = <&cpg 131>;
1081 };
1082
1083 vsp@fe930000 {
1084 compatible = "renesas,vsp1";
1085 reg = <0 0xfe930000 0 0x8000>;
1086 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1087 clocks = <&cpg CPG_MOD 128>;
1088 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1089 resets = <&cpg 128>;
1090 };
1091
1092 vsp@fe938000 {
1093 compatible = "renesas,vsp1";
1094 reg = <0 0xfe938000 0 0x8000>;
1095 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1096 clocks = <&cpg CPG_MOD 127>;
1097 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1098 resets = <&cpg 127>;
1099 };
1100
1101 du: display@feb00000 {
1102 compatible = "renesas,du-r8a7791";
1103 reg = <0 0xfeb00000 0 0x40000>,
1104 <0 0xfeb90000 0 0x1c>;
1105 reg-names = "du", "lvds.0";
1106 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1107 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1108 clocks = <&cpg CPG_MOD 724>,
1109 <&cpg CPG_MOD 723>,
1110 <&cpg CPG_MOD 726>;
1111 clock-names = "du.0", "du.1", "lvds.0";
1112 status = "disabled";
1113
1114 ports {
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1117
1118 port@0 {
1119 reg = <0>;
1120 du_out_rgb: endpoint {
1121 };
1122 };
1123 port@1 {
1124 reg = <1>;
1125 du_out_lvds0: endpoint {
1126 };
1127 };
1128 };
1129 };
1130
1131 can0: can@e6e80000 {
1132 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1133 reg = <0 0xe6e80000 0 0x1000>;
1134 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1135 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1136 <&can_clk>;
1137 clock-names = "clkp1", "clkp2", "can_clk";
1138 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1139 resets = <&cpg 916>;
1140 status = "disabled";
1141 };
1142
1143 can1: can@e6e88000 {
1144 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1145 reg = <0 0xe6e88000 0 0x1000>;
1146 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1147 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>,
1148 <&can_clk>;
1149 clock-names = "clkp1", "clkp2", "can_clk";
1150 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1151 resets = <&cpg 915>;
1152 status = "disabled";
1153 };
1154
1155 jpu: jpeg-codec@fe980000 {
1156 compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
1157 reg = <0 0xfe980000 0 0x10300>;
1158 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1159 clocks = <&cpg CPG_MOD 106>;
1160 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1161 resets = <&cpg 106>;
1162 };
1163
1164 /* External root clock */
1165 extal_clk: extal {
1166 compatible = "fixed-clock";
1167 #clock-cells = <0>;
1168 /* This value must be overridden by the board. */
1169 clock-frequency = <0>;
1170 };
1171
1172 /*
1173 * The external audio clocks are configured as 0 Hz fixed frequency
1174 * clocks by default.
1175 * Boards that provide audio clocks should override them.
1176 */
1177 audio_clk_a: audio_clk_a {
1178 compatible = "fixed-clock";
1179 #clock-cells = <0>;
1180 clock-frequency = <0>;
1181 };
1182 audio_clk_b: audio_clk_b {
1183 compatible = "fixed-clock";
1184 #clock-cells = <0>;
1185 clock-frequency = <0>;
1186 };
1187 audio_clk_c: audio_clk_c {
1188 compatible = "fixed-clock";
1189 #clock-cells = <0>;
1190 clock-frequency = <0>;
1191 };
1192
1193 /* External PCIe clock - can be overridden by the board */
1194 pcie_bus_clk: pcie_bus {
1195 compatible = "fixed-clock";
1196 #clock-cells = <0>;
1197 clock-frequency = <0>;
1198 };
1199
1200 /* External SCIF clock */
1201 scif_clk: scif {
1202 compatible = "fixed-clock";
1203 #clock-cells = <0>;
1204 /* This value must be overridden by the board. */
1205 clock-frequency = <0>;
1206 };
1207
1208 /* External USB clock - can be overridden by the board */
1209 usb_extal_clk: usb_extal {
1210 compatible = "fixed-clock";
1211 #clock-cells = <0>;
1212 clock-frequency = <48000000>;
1213 };
1214
1215 /* External CAN clock */
1216 can_clk: can {
1217 compatible = "fixed-clock";
1218 #clock-cells = <0>;
1219 /* This value must be overridden by the board. */
1220 clock-frequency = <0>;
1221 };
1222
1223 cpg: clock-controller@e6150000 {
1224 compatible = "renesas,r8a7791-cpg-mssr";
1225 reg = <0 0xe6150000 0 0x1000>;
1226 clocks = <&extal_clk>, <&usb_extal_clk>;
1227 clock-names = "extal", "usb_extal";
1228 #clock-cells = <2>;
1229 #power-domain-cells = <0>;
1230 #reset-cells = <1>;
1231 };
1232
1233 rst: reset-controller@e6160000 {
1234 compatible = "renesas,r8a7791-rst";
1235 reg = <0 0xe6160000 0 0x0100>;
1236 };
1237
1238 prr: chipid@ff000044 {
1239 compatible = "renesas,prr";
1240 reg = <0 0xff000044 0 4>;
1241 };
1242
1243 sysc: system-controller@e6180000 {
1244 compatible = "renesas,r8a7791-sysc";
1245 reg = <0 0xe6180000 0 0x0200>;
1246 #power-domain-cells = <1>;
1247 };
1248
1249 qspi: spi@e6b10000 {
1250 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1251 reg = <0 0xe6b10000 0 0x2c>;
1252 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1253 clocks = <&cpg CPG_MOD 917>;
1254 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1255 <&dmac1 0x17>, <&dmac1 0x18>;
1256 dma-names = "tx", "rx", "tx", "rx";
1257 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1258 resets = <&cpg 917>;
1259 num-cs = <1>;
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1262 status = "disabled";
1263 };
1264
1265 msiof0: spi@e6e20000 {
1266 compatible = "renesas,msiof-r8a7791",
1267 "renesas,rcar-gen2-msiof";
1268 reg = <0 0xe6e20000 0 0x0064>;
1269 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1270 clocks = <&cpg CPG_MOD 000>;
1271 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1272 <&dmac1 0x51>, <&dmac1 0x52>;
1273 dma-names = "tx", "rx", "tx", "rx";
1274 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1275 resets = <&cpg 0>;
1276 #address-cells = <1>;
1277 #size-cells = <0>;
1278 status = "disabled";
1279 };
1280
1281 msiof1: spi@e6e10000 {
1282 compatible = "renesas,msiof-r8a7791",
1283 "renesas,rcar-gen2-msiof";
1284 reg = <0 0xe6e10000 0 0x0064>;
1285 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1286 clocks = <&cpg CPG_MOD 208>;
1287 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1288 <&dmac1 0x55>, <&dmac1 0x56>;
1289 dma-names = "tx", "rx", "tx", "rx";
1290 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1291 resets = <&cpg 208>;
1292 #address-cells = <1>;
1293 #size-cells = <0>;
1294 status = "disabled";
1295 };
1296
1297 msiof2: spi@e6e00000 {
1298 compatible = "renesas,msiof-r8a7791",
1299 "renesas,rcar-gen2-msiof";
1300 reg = <0 0xe6e00000 0 0x0064>;
1301 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1302 clocks = <&cpg CPG_MOD 205>;
1303 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1304 <&dmac1 0x41>, <&dmac1 0x42>;
1305 dma-names = "tx", "rx", "tx", "rx";
1306 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1307 resets = <&cpg 205>;
1308 #address-cells = <1>;
1309 #size-cells = <0>;
1310 status = "disabled";
1311 };
1312
1313 xhci: usb@ee000000 {
1314 compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
1315 reg = <0 0xee000000 0 0xc00>;
1316 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1317 clocks = <&cpg CPG_MOD 328>;
1318 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1319 resets = <&cpg 328>;
1320 phys = <&usb2 1>;
1321 phy-names = "usb";
1322 status = "disabled";
1323 };
1324
1325 pci0: pci@ee090000 {
1326 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1327 device_type = "pci";
1328 reg = <0 0xee090000 0 0xc00>,
1329 <0 0xee080000 0 0x1100>;
1330 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1331 clocks = <&cpg CPG_MOD 703>;
1332 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1333 resets = <&cpg 703>;
1334 status = "disabled";
1335
1336 bus-range = <0 0>;
1337 #address-cells = <3>;
1338 #size-cells = <2>;
1339 #interrupt-cells = <1>;
1340 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1341 interrupt-map-mask = <0xff00 0 0 0x7>;
1342 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1343 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1344 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1345
1346 usb@1,0 {
1347 reg = <0x800 0 0 0 0>;
1348 phys = <&usb0 0>;
1349 phy-names = "usb";
1350 };
1351
1352 usb@2,0 {
1353 reg = <0x1000 0 0 0 0>;
1354 phys = <&usb0 0>;
1355 phy-names = "usb";
1356 };
1357 };
1358
1359 pci1: pci@ee0d0000 {
1360 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1361 device_type = "pci";
1362 reg = <0 0xee0d0000 0 0xc00>,
1363 <0 0xee0c0000 0 0x1100>;
1364 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MOD 703>;
1366 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1367 resets = <&cpg 703>;
1368 status = "disabled";
1369
1370 bus-range = <1 1>;
1371 #address-cells = <3>;
1372 #size-cells = <2>;
1373 #interrupt-cells = <1>;
1374 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1375 interrupt-map-mask = <0xff00 0 0 0x7>;
1376 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1377 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1378 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1379
1380 usb@1,0 {
1381 reg = <0x10800 0 0 0 0>;
1382 phys = <&usb2 0>;
1383 phy-names = "usb";
1384 };
1385
1386 usb@2,0 {
1387 reg = <0x11000 0 0 0 0>;
1388 phys = <&usb2 0>;
1389 phy-names = "usb";
1390 };
1391 };
1392
1393 pciec: pcie@fe000000 {
1394 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
1395 reg = <0 0xfe000000 0 0x80000>;
1396 #address-cells = <3>;
1397 #size-cells = <2>;
1398 bus-range = <0x00 0xff>;
1399 device_type = "pci";
1400 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1401 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1402 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1403 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1404 /* Map all possible DDR as inbound ranges */
1405 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1406 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1407 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1408 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1409 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1410 #interrupt-cells = <1>;
1411 interrupt-map-mask = <0 0 0 0>;
1412 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1413 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1414 clock-names = "pcie", "pcie_bus";
1415 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1416 resets = <&cpg 319>;
1417 status = "disabled";
1418 };
1419
1420 ipmmu_sy0: mmu@e6280000 {
1421 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1422 reg = <0 0xe6280000 0 0x1000>;
1423 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1424 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1425 #iommu-cells = <1>;
1426 status = "disabled";
1427 };
1428
1429 ipmmu_sy1: mmu@e6290000 {
1430 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1431 reg = <0 0xe6290000 0 0x1000>;
1432 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1433 #iommu-cells = <1>;
1434 status = "disabled";
1435 };
1436
1437 ipmmu_ds: mmu@e6740000 {
1438 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1439 reg = <0 0xe6740000 0 0x1000>;
1440 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1441 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1442 #iommu-cells = <1>;
1443 status = "disabled";
1444 };
1445
1446 ipmmu_mp: mmu@ec680000 {
1447 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1448 reg = <0 0xec680000 0 0x1000>;
1449 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1450 #iommu-cells = <1>;
1451 status = "disabled";
1452 };
1453
1454 ipmmu_mx: mmu@fe951000 {
1455 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1456 reg = <0 0xfe951000 0 0x1000>;
1457 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1458 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1459 #iommu-cells = <1>;
1460 status = "disabled";
1461 };
1462
1463 ipmmu_rt: mmu@ffc80000 {
1464 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1465 reg = <0 0xffc80000 0 0x1000>;
1466 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1467 #iommu-cells = <1>;
1468 status = "disabled";
1469 };
1470
1471 ipmmu_gp: mmu@e62a0000 {
1472 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1473 reg = <0 0xe62a0000 0 0x1000>;
1474 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1475 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1476 #iommu-cells = <1>;
1477 status = "disabled";
1478 };
1479
1480 rcar_sound: sound@ec500000 {
1481 /*
1482 * #sound-dai-cells is required
1483 *
1484 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1485 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1486 */
1487 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1488 reg = <0 0xec500000 0 0x1000>, /* SCU */
1489 <0 0xec5a0000 0 0x100>, /* ADG */
1490 <0 0xec540000 0 0x1000>, /* SSIU */
1491 <0 0xec541000 0 0x280>, /* SSI */
1492 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1493 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1494
1495 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1507 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1508 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1509 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1510 <&cpg CPG_CORE R8A7791_CLK_M2>;
1511 clock-names = "ssi-all",
1512 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1513 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1514 "src.9", "src.8", "src.7", "src.6", "src.5",
1515 "src.4", "src.3", "src.2", "src.1", "src.0",
1516 "ctu.0", "ctu.1",
1517 "mix.0", "mix.1",
1518 "dvc.0", "dvc.1",
1519 "clk_a", "clk_b", "clk_c", "clk_i";
1520 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1521 resets = <&cpg 1005>,
1522 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1523 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1524 <&cpg 1014>, <&cpg 1015>;
1525 reset-names = "ssi-all",
1526 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1527 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1528
1529 status = "disabled";
1530
1531 rcar_sound,dvc {
1532 dvc0: dvc-0 {
1533 dmas = <&audma1 0xbc>;
1534 dma-names = "tx";
1535 };
1536 dvc1: dvc-1 {
1537 dmas = <&audma1 0xbe>;
1538 dma-names = "tx";
1539 };
1540 };
1541
1542 rcar_sound,mix {
1543 mix0: mix-0 { };
1544 mix1: mix-1 { };
1545 };
1546
1547 rcar_sound,ctu {
1548 ctu00: ctu-0 { };
1549 ctu01: ctu-1 { };
1550 ctu02: ctu-2 { };
1551 ctu03: ctu-3 { };
1552 ctu10: ctu-4 { };
1553 ctu11: ctu-5 { };
1554 ctu12: ctu-6 { };
1555 ctu13: ctu-7 { };
1556 };
1557
1558 rcar_sound,src {
1559 src0: src-0 {
1560 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1561 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1562 dma-names = "rx", "tx";
1563 };
1564 src1: src-1 {
1565 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1566 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1567 dma-names = "rx", "tx";
1568 };
1569 src2: src-2 {
1570 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1571 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1572 dma-names = "rx", "tx";
1573 };
1574 src3: src-3 {
1575 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1576 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1577 dma-names = "rx", "tx";
1578 };
1579 src4: src-4 {
1580 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1581 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1582 dma-names = "rx", "tx";
1583 };
1584 src5: src-5 {
1585 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1586 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1587 dma-names = "rx", "tx";
1588 };
1589 src6: src-6 {
1590 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1591 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1592 dma-names = "rx", "tx";
1593 };
1594 src7: src-7 {
1595 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1596 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1597 dma-names = "rx", "tx";
1598 };
1599 src8: src-8 {
1600 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1601 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1602 dma-names = "rx", "tx";
1603 };
1604 src9: src-9 {
1605 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1606 dmas = <&audma0 0x97>, <&audma1 0xba>;
1607 dma-names = "rx", "tx";
1608 };
1609 };
1610
1611 rcar_sound,ssi {
1612 ssi0: ssi-0 {
1613 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1614 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1615 dma-names = "rx", "tx", "rxu", "txu";
1616 };
1617 ssi1: ssi-1 {
1618 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1619 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1620 dma-names = "rx", "tx", "rxu", "txu";
1621 };
1622 ssi2: ssi-2 {
1623 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1624 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1625 dma-names = "rx", "tx", "rxu", "txu";
1626 };
1627 ssi3: ssi-3 {
1628 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1629 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1630 dma-names = "rx", "tx", "rxu", "txu";
1631 };
1632 ssi4: ssi-4 {
1633 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1634 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1635 dma-names = "rx", "tx", "rxu", "txu";
1636 };
1637 ssi5: ssi-5 {
1638 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1639 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1640 dma-names = "rx", "tx", "rxu", "txu";
1641 };
1642 ssi6: ssi-6 {
1643 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1644 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1645 dma-names = "rx", "tx", "rxu", "txu";
1646 };
1647 ssi7: ssi-7 {
1648 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1649 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1650 dma-names = "rx", "tx", "rxu", "txu";
1651 };
1652 ssi8: ssi-8 {
1653 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1654 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1655 dma-names = "rx", "tx", "rxu", "txu";
1656 };
1657 ssi9: ssi-9 {
1658 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1659 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1660 dma-names = "rx", "tx", "rxu", "txu";
1661 };
1662 };
1663 };
1664};