| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Stefano Babic | eae4988 | 2011-01-20 08:05:15 +0000 | [diff] [blame] | 2 | /* |
| 3 | * |
| 4 | * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> |
| 5 | * |
| 6 | * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. |
| Stefano Babic | eae4988 | 2011-01-20 08:05:15 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __BOARD_MX35_3STACK_H |
| 10 | #define __BOARD_MX35_3STACK_H |
| 11 | |
| Stefano Babic | eae4988 | 2011-01-20 08:05:15 +0000 | [diff] [blame] | 12 | #define DBG_BASE_ADDR WEIM_CTRL_CS5 |
| 13 | #define DBG_CSCR_U_CONFIG 0x0000D843 |
| 14 | #define DBG_CSCR_L_CONFIG 0x22252521 |
| 15 | #define DBG_CSCR_A_CONFIG 0x22220A00 |
| 16 | |
| 17 | #define CCM_CCMR_CONFIG 0x003F4208 |
| 18 | #define CCM_PDR0_CONFIG 0x00801000 |
| 19 | |
| Stefano Babic | eae4988 | 2011-01-20 08:05:15 +0000 | [diff] [blame] | 20 | /* MEMORY SETTING */ |
| 21 | #define ESDCTL_0x92220000 0x92220000 |
| 22 | #define ESDCTL_0xA2220000 0xA2220000 |
| 23 | #define ESDCTL_0xB2220000 0xB2220000 |
| 24 | #define ESDCTL_0x82228080 0x82228080 |
| 25 | |
| 26 | #define ESDCTL_PRECHARGE 0x00000400 |
| 27 | |
| 28 | #define ESDCTL_MDDR_CONFIG 0x007FFC3F |
| 29 | #define ESDCTL_MDDR_MR 0x00000033 |
| 30 | #define ESDCTL_MDDR_EMR 0x02000000 |
| 31 | |
| 32 | #define ESDCTL_DDR2_CONFIG 0x007FFC3F |
| 33 | #define ESDCTL_DDR2_EMR2 0x04000000 |
| 34 | #define ESDCTL_DDR2_EMR3 0x06000000 |
| 35 | #define ESDCTL_DDR2_EN_DLL 0x02000400 |
| 36 | #define ESDCTL_DDR2_RESET_DLL 0x00000333 |
| 37 | #define ESDCTL_DDR2_MR 0x00000233 |
| 38 | #define ESDCTL_DDR2_OCD_DEFAULT 0x02000780 |
| 39 | |
| 40 | #define ESDCTL_DELAY_LINE5 0x00F49F00 |
| 41 | #endif /* __BOARD_MX35_3STACK_H */ |