Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2010-2011 Calxeda, Inc. |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <ahci.h> |
Rob Herring | bd0d90e | 2012-02-21 12:52:26 +0000 | [diff] [blame] | 8 | #include <netdev.h> |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 9 | #include <scsi.h> |
| 10 | |
Alexey Brodkin | 1ace402 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 11 | #include <linux/sizes.h> |
Rob Herring | 877012d | 2012-02-01 16:57:54 +0000 | [diff] [blame] | 12 | #include <asm/io.h> |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 13 | |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 14 | #define HB_AHCI_BASE 0xffe08000 |
| 15 | |
Rob Herring | 083ffd6 | 2015-06-05 00:58:42 +0100 | [diff] [blame] | 16 | #define HB_SCU_A9_PWR_STATUS 0xfff10008 |
Rob Herring | 0c34e69 | 2012-02-01 16:57:55 +0000 | [diff] [blame] | 17 | #define HB_SREG_A9_PWR_REQ 0xfff3cf00 |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 18 | #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04 |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 19 | #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20 |
Mark Langsdorf | f897332 | 2015-06-05 00:58:43 +0100 | [diff] [blame] | 20 | #define HB_SREG_A15_PWR_CTRL 0xfff3c200 |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 21 | |
Rob Herring | 0c34e69 | 2012-02-01 16:57:55 +0000 | [diff] [blame] | 22 | #define HB_PWR_SUSPEND 0 |
| 23 | #define HB_PWR_SOFT_RESET 1 |
| 24 | #define HB_PWR_HARD_RESET 2 |
| 25 | #define HB_PWR_SHUTDOWN 3 |
| 26 | |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 27 | #define PWRDOM_STAT_SATA 0x80000000 |
| 28 | #define PWRDOM_STAT_PCI 0x40000000 |
| 29 | #define PWRDOM_STAT_EMMC 0x20000000 |
| 30 | |
Rob Herring | 083ffd6 | 2015-06-05 00:58:42 +0100 | [diff] [blame] | 31 | #define HB_SCU_A9_PWR_NORMAL 0 |
| 32 | #define HB_SCU_A9_PWR_DORMANT 2 |
| 33 | #define HB_SCU_A9_PWR_OFF 3 |
| 34 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 35 | DECLARE_GLOBAL_DATA_PTR; |
| 36 | |
Mark Langsdorf | ef51c41 | 2015-06-05 00:58:49 +0100 | [diff] [blame] | 37 | void cphy_disable_overrides(void); |
| 38 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 39 | /* |
| 40 | * Miscellaneous platform dependent initialisations |
| 41 | */ |
| 42 | int board_init(void) |
| 43 | { |
| 44 | icache_enable(); |
| 45 | |
| 46 | return 0; |
| 47 | } |
| 48 | |
Rob Herring | 9a42098 | 2011-12-15 11:15:50 +0000 | [diff] [blame] | 49 | /* We know all the init functions have been run now */ |
| 50 | int board_eth_init(bd_t *bis) |
| 51 | { |
| 52 | int rc = 0; |
| 53 | |
| 54 | #ifdef CONFIG_CALXEDA_XGMAC |
| 55 | rc += calxedaxgmac_initialize(0, 0xfff50000); |
| 56 | rc += calxedaxgmac_initialize(1, 0xfff51000); |
| 57 | #endif |
| 58 | return rc; |
| 59 | } |
| 60 | |
Ian Campbell | b946322 | 2014-03-07 01:20:57 +0000 | [diff] [blame] | 61 | #ifdef CONFIG_SCSI_AHCI_PLAT |
| 62 | void scsi_init(void) |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 63 | { |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 64 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 65 | |
Mark Langsdorf | ef51c41 | 2015-06-05 00:58:49 +0100 | [diff] [blame] | 66 | cphy_disable_overrides(); |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 67 | if (reg & PWRDOM_STAT_SATA) { |
Scott Wood | 9efaca3 | 2015-04-17 09:19:01 -0500 | [diff] [blame] | 68 | ahci_init((void __iomem *)HB_AHCI_BASE); |
Simon Glass | 8eab1a5 | 2017-06-14 21:28:41 -0600 | [diff] [blame] | 69 | scsi_scan(true); |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 70 | } |
Ian Campbell | b946322 | 2014-03-07 01:20:57 +0000 | [diff] [blame] | 71 | } |
| 72 | #endif |
| 73 | |
| 74 | #ifdef CONFIG_MISC_INIT_R |
| 75 | int misc_init_r(void) |
| 76 | { |
| 77 | char envbuffer[16]; |
| 78 | u32 boot_choice; |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 79 | |
| 80 | boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; |
| 81 | sprintf(envbuffer, "bootcmd%d", boot_choice); |
Simon Glass | 00caae6 | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 82 | if (env_get(envbuffer)) { |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 83 | sprintf(envbuffer, "run bootcmd%d", boot_choice); |
Simon Glass | 382bee5 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 84 | env_set("bootcmd", envbuffer); |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 85 | } else |
Simon Glass | 382bee5 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 86 | env_set("bootcmd", ""); |
Rob Herring | 4a3ea21 | 2012-02-01 16:57:57 +0000 | [diff] [blame] | 87 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 88 | return 0; |
| 89 | } |
Rob Herring | 9539502 | 2013-06-12 22:24:53 -0500 | [diff] [blame] | 90 | #endif |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 91 | |
| 92 | int dram_init(void) |
| 93 | { |
| 94 | gd->ram_size = SZ_512M; |
| 95 | return 0; |
| 96 | } |
| 97 | |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 98 | #if defined(CONFIG_OF_BOARD_SETUP) |
Simon Glass | e895a4b | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 99 | int ft_board_setup(void *fdt, bd_t *bd) |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 100 | { |
| 101 | static const char disabled[] = "disabled"; |
| 102 | u32 reg = readl(HB_SREG_A9_PWRDOM_STAT); |
| 103 | |
| 104 | if (!(reg & PWRDOM_STAT_SATA)) |
| 105 | do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status", |
| 106 | disabled, sizeof(disabled), 1); |
| 107 | |
| 108 | if (!(reg & PWRDOM_STAT_EMMC)) |
| 109 | do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status", |
| 110 | disabled, sizeof(disabled), 1); |
Simon Glass | e895a4b | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 111 | |
| 112 | return 0; |
Rob Herring | 76c3999 | 2013-06-12 22:24:52 -0500 | [diff] [blame] | 113 | } |
| 114 | #endif |
| 115 | |
Mark Langsdorf | f897332 | 2015-06-05 00:58:43 +0100 | [diff] [blame] | 116 | static int is_highbank(void) |
| 117 | { |
| 118 | uint32_t midr; |
| 119 | |
| 120 | asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); |
| 121 | |
| 122 | return (midr & 0xfff0) == 0xc090; |
| 123 | } |
| 124 | |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 125 | void reset_cpu(ulong addr) |
| 126 | { |
Rob Herring | 0c34e69 | 2012-02-01 16:57:55 +0000 | [diff] [blame] | 127 | writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ); |
Mark Langsdorf | f897332 | 2015-06-05 00:58:43 +0100 | [diff] [blame] | 128 | if (is_highbank()) |
| 129 | writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS); |
| 130 | else |
| 131 | writel(0x1, HB_SREG_A15_PWR_CTRL); |
Rob Herring | 5bedf88 | 2012-12-02 17:06:22 +0000 | [diff] [blame] | 132 | |
| 133 | wfi(); |
Rob Herring | 37fc0ed | 2011-10-24 08:50:20 +0000 | [diff] [blame] | 134 | } |
Mark Langsdorf | ef51c41 | 2015-06-05 00:58:49 +0100 | [diff] [blame] | 135 | |
| 136 | /* |
| 137 | * turn off the override before transferring control to Linux, since Linux |
| 138 | * may not support spread spectrum. |
| 139 | */ |
| 140 | void arch_preboot_os(void) |
| 141 | { |
| 142 | cphy_disable_overrides(); |
| 143 | } |