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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Minkyu Kang9e408082011-01-24 15:33:50 +09002/*
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
Minkyu Kang9e408082011-01-24 15:33:50 +09006 */
7
8#include <common.h>
Piotr Wilczekff0fedd2012-10-19 05:34:03 +00009#include <spi.h>
Piotr Wilczekd984b9f2012-10-19 05:34:07 +000010#include <lcd.h>
Minkyu Kang9e408082011-01-24 15:33:50 +090011#include <asm/io.h>
Piotr Wilczekff0fedd2012-10-19 05:34:03 +000012#include <asm/gpio.h>
Minkyu Kang9e408082011-01-24 15:33:50 +090013#include <asm/arch/adc.h>
Piotr Wilczekea7991b2012-09-20 00:19:59 +000014#include <asm/arch/pinmux.h>
Piotr Wilczek11a44792012-09-20 00:20:00 +000015#include <asm/arch/watchdog.h>
Piotr Wilczekd984b9f2012-10-19 05:34:07 +000016#include <ld9040.h>
Łukasz Majewskic7336812012-11-13 03:21:55 +000017#include <power/pmic.h>
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +010018#include <usb.h>
Marek Vasut5d5716e2015-12-04 02:51:20 +010019#include <usb/dwc2_udc.h>
Lukasz Majewskiddc7e542011-12-15 10:32:12 +010020#include <asm/arch/cpu.h>
Łukasz Majewskic7336812012-11-13 03:21:55 +000021#include <power/max8998_pmic.h>
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +010022#include <libtizen.h>
Przemyslaw Marczak82b0a0552014-01-22 11:24:20 +010023#include <samsung/misc.h>
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +010024#include <usb_mass_storage.h>
Simon Glassc62db352017-05-31 19:47:48 -060025#include <asm/mach-types.h>
Minkyu Kang9e408082011-01-24 15:33:50 +090026
27DECLARE_GLOBAL_DATA_PTR;
28
Minkyu Kang9e408082011-01-24 15:33:50 +090029unsigned int board_rev;
Jaehoon Chung816d8b52017-01-09 14:47:50 +090030static int init_pmic_lcd(void);
Minkyu Kang9e408082011-01-24 15:33:50 +090031
32u32 get_board_rev(void)
33{
34 return board_rev;
35}
36
Jaehoon Chung816d8b52017-01-09 14:47:50 +090037int exynos_power_init(void)
38{
39 return init_pmic_lcd();
40}
41
Minkyu Kang9e408082011-01-24 15:33:50 +090042static int get_hwrev(void)
43{
44 return board_rev & 0xFF;
45}
46
Minkyu Kang9e408082011-01-24 15:33:50 +090047static unsigned short get_adc_value(int channel)
48{
49 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
50 unsigned short ret = 0;
51 unsigned int reg;
52 unsigned int loop = 0;
53
54 writel(channel & 0xF, &adc->adcmux);
55 writel((1 << 14) | (49 << 6), &adc->adccon);
56 writel(1000 & 0xffff, &adc->adcdly);
57 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
58 udelay(10);
59 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
60 udelay(10);
61
62 do {
63 udelay(1);
64 reg = readl(&adc->adccon);
65 } while (!(reg & (1 << 15)) && (loop++ < 1000));
66
67 ret = readl(&adc->adcdat0) & 0xFFF;
68
69 return ret;
70}
71
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000072static int adc_power_control(int on)
73{
Jaehoon Chung816d8b52017-01-09 14:47:50 +090074 struct udevice *dev;
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000075 int ret;
Jaehoon Chung816d8b52017-01-09 14:47:50 +090076 u8 reg;
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000077
Jaehoon Chung816d8b52017-01-09 14:47:50 +090078 ret = pmic_get("max8998-pmic", &dev);
79 if (ret) {
80 puts("Failed to get MAX8998!\n");
81 return ret;
82 }
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000083
Jaehoon Chung816d8b52017-01-09 14:47:50 +090084 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
85 if (on)
86 reg |= MAX8998_LDO4;
87 else
88 reg &= ~MAX8998_LDO4;
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000089
Jaehoon Chung816d8b52017-01-09 14:47:50 +090090 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
91 if (ret) {
92 puts("MAX8998 LDO setting error\n");
93 return -EINVAL;
94 }
95
Simon Glassfc47cf92016-11-23 06:34:40 -070096 return 0;
Łukasz Majewski4d86bf02012-03-26 21:53:48 +000097}
98
Minkyu Kang9e408082011-01-24 15:33:50 +090099static unsigned int get_hw_revision(void)
100{
101 int hwrev, mode0, mode1;
102
Łukasz Majewski4d86bf02012-03-26 21:53:48 +0000103 adc_power_control(1);
104
Minkyu Kang9e408082011-01-24 15:33:50 +0900105 mode0 = get_adc_value(1); /* HWREV_MODE0 */
106 mode1 = get_adc_value(2); /* HWREV_MODE1 */
107
108 /*
109 * XXX Always set the default hwrev as the latest board
110 * ADC = (voltage) / 3.3 * 4096
111 */
112 hwrev = 3;
113
114#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
115 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
116 hwrev = 0x0; /* 0.01V 0.01V */
117 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
118 hwrev = 0x1; /* 610mV 0.01V */
119 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
120 hwrev = 0x2; /* 1.16V 0.01V */
121 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
122 hwrev = 0x3; /* 1.79V 0.01V */
123#undef IS_RANGE
124
125 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
126
Łukasz Majewski4d86bf02012-03-26 21:53:48 +0000127 adc_power_control(0);
128
Minkyu Kang9e408082011-01-24 15:33:50 +0900129 return hwrev;
130}
131
132static void check_hw_revision(void)
133{
134 int hwrev;
135
136 hwrev = get_hw_revision();
137
138 board_rev |= hwrev;
139}
140
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100141#ifdef CONFIG_USB_GADGET
142static int s5pc210_phy_control(int on)
143{
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900144 struct udevice *dev;
145 int ret;
146 u8 reg;
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100147
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900148 ret = pmic_get("max8998-pmic", &dev);
149 if (ret) {
150 puts("Failed to get MAX8998!\n");
151 return ret;
152 }
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100153
154 if (on) {
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900155 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
156 reg |= MAX8998_SAFEOUT1;
157 ret |= pmic_reg_write(dev,
158 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
159
160 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
161 reg |= MAX8998_LDO3;
162 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
163
164 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
165 reg |= MAX8998_LDO8;
166 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100167
168 } else {
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900169 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
170 reg &= ~MAX8998_LDO8;
171 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
172
173 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
174 reg &= ~MAX8998_LDO3;
175 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
176
177 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
178 reg &= ~MAX8998_SAFEOUT1;
179 ret |= pmic_reg_write(dev,
180 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100181 }
182
183 if (ret) {
184 puts("MAX8998 LDO setting error!\n");
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900185 return -EINVAL;
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100186 }
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900187
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100188 return 0;
189}
190
Marek Vasutc0982872015-12-04 02:23:29 +0100191struct dwc2_plat_otg_data s5pc210_otg_data = {
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100192 .phy_control = s5pc210_phy_control,
193 .regs_phy = EXYNOS4_USBPHY_BASE,
194 .regs_otg = EXYNOS4_USBOTG_BASE,
195 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
196 .usb_flags = PHY0_SLEEP,
197};
198#endif
Piotr Wilczek11a44792012-09-20 00:20:00 +0000199
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100200int board_usb_init(int index, enum usb_init_type init)
201{
202 debug("USB_udc_probe\n");
Marek Vasuta4bb9b32015-12-04 02:26:33 +0100203 return dwc2_udc_probe(&s5pc210_otg_data);
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100204}
205
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100206int exynos_early_init_f(void)
Piotr Wilczek11a44792012-09-20 00:20:00 +0000207{
208 wdt_stop();
209
210 return 0;
211}
Piotr Wilczekff0fedd2012-10-19 05:34:03 +0000212
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900213static int init_pmic_lcd(void)
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000214{
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900215 struct udevice *dev;
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000216 unsigned char val;
217 int ret = 0;
218
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900219 ret = pmic_get("max8998-pmic", &dev);
220 if (ret) {
221 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
222 return ret;
223 }
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000224
225 /* LDO7 1.8V */
226 val = 0x02; /* (1800 - 1600) / 100; */
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900227 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000228
229 /* LDO17 3.0V */
230 val = 0xe; /* (3000 - 1600) / 100; */
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900231 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000232
233 /* Disable unneeded regulators */
234 /*
235 * ONOFF1
236 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
237 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
238 */
239 val = 0xB9;
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900240 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000241
242 /* ONOFF2
243 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
244 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
245 */
246 val = 0x50;
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900247 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000248
249 /* ONOFF3
250 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
251 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
252 */
253 val = 0x00;
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900254 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000255
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900256 if (ret) {
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000257 puts("LCD pmic initialisation error!\n");
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900258 return -EINVAL;
259 }
260
261 return 0;
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000262}
263
Ajay Kumar29fd5702013-02-21 23:52:57 +0000264void exynos_cfg_lcd_gpio(void)
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000265{
266 unsigned int i, f3_end = 4;
267
268 for (i = 0; i < 8; i++) {
269 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530270 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
271 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
272 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000273 /* pull-up/down disable */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530274 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
275 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
276 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000277
278 /* drive strength to max (24bit) */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530279 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
280 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
281 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
282 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
283 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
284 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000285 }
286
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530287 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000288 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530289 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000290 /* pull-up/down disable */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530291 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000292 /* drive strength to max (24bit) */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530293 gpio_set_drv(i, S5P_GPIO_DRV_4X);
294 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000295 }
296
297 /* gpio pad configuration for LCD reset. */
Simon Glass7f196102014-10-20 19:48:39 -0600298 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530299 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000300}
301
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100302int mipi_power(void)
303{
304 return 0;
305}
306
Ajay Kumar29fd5702013-02-21 23:52:57 +0000307void exynos_reset_lcd(void)
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000308{
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530309 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000310 udelay(10000);
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530311 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000312 udelay(10000);
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530313 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000314 udelay(100);
315}
316
Ajay Kumar29fd5702013-02-21 23:52:57 +0000317void exynos_lcd_power_on(void)
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000318{
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900319 struct udevice *dev;
320 int ret;
321 u8 reg;
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000322
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900323 ret = pmic_get("max8998-pmic", &dev);
324 if (ret) {
325 puts("Failed to get MAX8998!\n");
Minkyu Kangfbef8e62012-12-10 22:43:57 +0900326 return;
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900327 }
Minkyu Kangfbef8e62012-12-10 22:43:57 +0900328
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900329 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
330 reg |= MAX8998_LDO17;
331 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
332 if (ret) {
333 puts("MAX8998 LDO setting error\n");
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000334 return;
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900335 }
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000336
Jaehoon Chung816d8b52017-01-09 14:47:50 +0900337 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
338 reg |= MAX8998_LDO7;
339 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
340 if (ret) {
341 puts("MAX8998 LDO setting error\n");
342 return;
343 }
Piotr Wilczekd984b9f2012-10-19 05:34:07 +0000344}
345
Ajay Kumar29fd5702013-02-21 23:52:57 +0000346void exynos_cfg_ldo(void)
347{
348 ld9040_cfg_ldo();
349}
350
351void exynos_enable_ldo(unsigned int onoff)
352{
353 ld9040_enable_ldo(onoff);
354}
355
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100356int exynos_init(void)
Piotr Wilczekff0fedd2012-10-19 05:34:03 +0000357{
Piotr Wilczekff0fedd2012-10-19 05:34:03 +0000358 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100359
360 switch (get_hwrev()) {
361 case 0:
362 /*
363 * Set the low to enable LDO_EN
364 * But when you use the test board for eMMC booting
365 * you should set it HIGH since it removes the inverter
366 */
367 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Simon Glass7f196102014-10-20 19:48:39 -0600368 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530369 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100370 break;
371 default:
372 /*
373 * Default reset state is High and there's no inverter
374 * But set it as HIGH to ensure
375 */
376 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Simon Glass7f196102014-10-20 19:48:39 -0600377 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530378 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100379 break;
380 }
Piotr Wilczekff0fedd2012-10-19 05:34:03 +0000381
Piotr Wilczekff0fedd2012-10-19 05:34:03 +0000382 check_hw_revision();
383 printf("HW Revision:\t0x%x\n", board_rev);
384
385 return 0;
386}
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100387
Simon Glassea743e62016-02-21 21:08:54 -0700388#ifdef CONFIG_LCD
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100389void exynos_lcd_misc_init(vidinfo_t *vid)
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100390{
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100391#ifdef CONFIG_TIZEN
392 get_tizen_logo_info(vid);
Piotr Wilczek815a6072014-01-22 15:54:34 +0100393#endif
Piotr Wilczek3f41ffe2014-03-07 14:59:47 +0100394
395 /* for LD9040. */
396 vid->pclk_name = 1; /* MPLL */
397 vid->sclk_div = 1;
398
Simon Glass382bee52017-08-03 12:22:09 -0600399 env_set("lcdinfo", "lcd=ld9040");
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100400}
Simon Glassea743e62016-02-21 21:08:54 -0700401#endif