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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
roy zangb825f152006-11-02 19:12:31 +08002/*
3 * (C) Copyright 2004 Tundra Semiconductor Corp.
4 * Author: Alex Bounine
5 *
Simon Glass28527092016-11-23 06:34:44 -07006 * NOTE: This driver should be converted to driver model before June 2017.
7 * Please see doc/driver-model/i2c-howto.txt for instructions.
roy zangb825f152006-11-02 19:12:31 +08008 */
9
10#include <config.h>
roy zangee311212006-12-01 11:47:36 +080011#include <common.h>
roy zangb825f152006-11-02 19:12:31 +080012
roy zangb825f152006-11-02 19:12:31 +080013#include <tsi108.h>
14
Jon Loeligercb51c0b2007-07-09 17:39:42 -050015#if defined(CONFIG_CMD_I2C)
roy zangb825f152006-11-02 19:12:31 +080016
roy zangee311212006-12-01 11:47:36 +080017#define I2C_DELAY 100000
roy zangb825f152006-11-02 19:12:31 +080018#undef DEBUG_I2C
19
20#ifdef DEBUG_I2C
roy zangee311212006-12-01 11:47:36 +080021#define DPRINT(x) printf (x)
roy zangb825f152006-11-02 19:12:31 +080022#else
23#define DPRINT(x)
24#endif
25
26/* All functions assume that Tsi108 I2C block is the only master on the bus */
27/* I2C read helper function */
28
Peter Tyserf0722ee2009-04-24 15:34:09 -050029void i2c_init(int speed, int slaveaddr)
30{
31 /*
32 * The TSI108 has a fixed I2C clock rate and doesn't support slave
33 * operation. This function only exists as a stub to fit into the
34 * U-Boot I2C API.
35 */
36}
37
roy zangee311212006-12-01 11:47:36 +080038static int i2c_read_byte (
roy zangb825f152006-11-02 19:12:31 +080039 uint i2c_chan, /* I2C channel number: 0 - main, 1 - SDC SPD */
40 uchar chip_addr,/* I2C device address on the bus */
41 uint byte_addr, /* Byte address within I2C device */
42 uchar * buffer /* pointer to data buffer */
43 )
44{
45 u32 temp;
46 u32 to_count = I2C_DELAY;
47 u32 op_status = TSI108_I2C_TIMEOUT_ERR;
48 u32 chan_offset = TSI108_I2C_OFFSET;
49
roy zangee311212006-12-01 11:47:36 +080050 DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n",
roy zangb825f152006-11-02 19:12:31 +080051 i2c_chan, chip_addr, byte_addr));
52
roy zangee311212006-12-01 11:47:36 +080053 if (0 != i2c_chan)
roy zangb825f152006-11-02 19:12:31 +080054 chan_offset = TSI108_I2C_SDRAM_OFFSET;
roy zangb825f152006-11-02 19:12:31 +080055
56 /* Check if I2C operation is in progress */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
roy zangb825f152006-11-02 19:12:31 +080058
59 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS |
roy zangee311212006-12-01 11:47:36 +080060 I2C_CNTRL2_START))) {
roy zangb825f152006-11-02 19:12:31 +080061 /* Set device address and operation (read = 0) */
62 temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) |
63 ((chip_addr >> 3) & 0x0F);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) =
roy zangb825f152006-11-02 19:12:31 +080065 temp;
66
67 /* Issue the read command
roy zangee311212006-12-01 11:47:36 +080068 * (at this moment all other parameters are 0
roy zangb825f152006-11-02 19:12:31 +080069 * (size = 1 byte, lane = 0)
70 */
71
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) =
roy zangb825f152006-11-02 19:12:31 +080073 (I2C_CNTRL2_START);
74
75 /* Wait until operation completed */
76 do {
77 /* Read I2C operation status */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
roy zangb825f152006-11-02 19:12:31 +080079
Wolfgang Denk647d3c32007-03-04 01:36:05 +010080 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
81 if (0 == (temp &
roy zangb825f152006-11-02 19:12:31 +080082 (I2C_CNTRL2_I2C_CFGERR |
83 I2C_CNTRL2_I2C_TO_ERR))
84 ) {
85 op_status = TSI108_I2C_SUCCESS;
86
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE +
roy zangb825f152006-11-02 19:12:31 +080088 chan_offset +
89 I2C_RD_DATA);
90
91 *buffer = (u8) (temp & 0xFF);
92 } else {
93 /* report HW error */
94 op_status = TSI108_I2C_IF_ERROR;
95
roy zangee311212006-12-01 11:47:36 +080096 DPRINT (("I2C HW error reported: 0x%02x\n", temp));
roy zangb825f152006-11-02 19:12:31 +080097 }
98
99 break;
100 }
101 } while (to_count--);
102 } else {
103 op_status = TSI108_I2C_IF_BUSY;
104
roy zangee311212006-12-01 11:47:36 +0800105 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
roy zangb825f152006-11-02 19:12:31 +0800106 }
107
roy zangee311212006-12-01 11:47:36 +0800108 DPRINT (("I2C read_byte() status: 0x%02x\n", op_status));
roy zangb825f152006-11-02 19:12:31 +0800109 return op_status;
110}
111
roy zangee311212006-12-01 11:47:36 +0800112/*
roy zangb825f152006-11-02 19:12:31 +0800113 * I2C Read interface as defined in "include/i2c.h" :
114 * chip_addr: I2C chip address, range 0..127
115 * (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
116 * NOTE: The bit 7 in the chip_addr serves as a channel select.
Peter Tyser0f89c542009-04-18 22:34:03 -0500117 * This hack is for enabling "i2c sdram" command on Tsi108 boards
roy zangee311212006-12-01 11:47:36 +0800118 * without changes to common code. Used for I2C reads only.
roy zangb825f152006-11-02 19:12:31 +0800119 * byte_addr: Memory or register address within the chip
120 * alen: Number of bytes to use for addr (typically 1, 2 for larger
121 * memories, 0 for register type devices with only one
122 * register)
123 * buffer: Pointer to destination buffer for data to be read
124 * len: How many bytes to read
125 *
126 * Returns: 0 on success, not 0 on failure
127 */
128
roy zangee311212006-12-01 11:47:36 +0800129int i2c_read (uchar chip_addr, uint byte_addr, int alen,
130 uchar * buffer, int len)
roy zangb825f152006-11-02 19:12:31 +0800131{
132 u32 op_status = TSI108_I2C_PARAM_ERR;
133 u32 i2c_if = 0;
134
135 /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/
136 if (0xD0 == (chip_addr & ~0x07)) {
137 i2c_if = 1;
138 chip_addr &= 0x7F;
139 }
140 /* Check for valid I2C address */
141 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
142 while (len--) {
Wolfgang Denk647d3c32007-03-04 01:36:05 +0100143 op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++);
roy zangb825f152006-11-02 19:12:31 +0800144
145 if (TSI108_I2C_SUCCESS != op_status) {
roy zangee311212006-12-01 11:47:36 +0800146 DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
roy zangb825f152006-11-02 19:12:31 +0800147
148 break;
149 }
150 }
151 }
152
roy zangee311212006-12-01 11:47:36 +0800153 DPRINT (("I2C read() status: 0x%02x\n", op_status));
roy zangb825f152006-11-02 19:12:31 +0800154 return op_status;
155}
156
157/* I2C write helper function */
158
roy zangee311212006-12-01 11:47:36 +0800159static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */
roy zangb825f152006-11-02 19:12:31 +0800160 uint byte_addr, /* Byte address within I2C device */
161 uchar * buffer /* pointer to data buffer */
162 )
163{
164 u32 temp;
165 u32 to_count = I2C_DELAY;
166 u32 op_status = TSI108_I2C_TIMEOUT_ERR;
167
168 /* Check if I2C operation is in progress */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
roy zangb825f152006-11-02 19:12:31 +0800170
Wolfgang Denk647d3c32007-03-04 01:36:05 +0100171 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
roy zangb825f152006-11-02 19:12:31 +0800172 /* Place data into the I2C Tx Register */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
roy zangb825f152006-11-02 19:12:31 +0800174 I2C_TX_DATA) = (u32) * buffer;
175
176 /* Set device address and operation */
177 temp =
178 I2C_CNTRL1_I2CWRITE | (byte_addr << 16) |
179 ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
roy zangb825f152006-11-02 19:12:31 +0800181 I2C_CNTRL1) = temp;
182
183 /* Issue the write command (at this moment all other parameters
184 * are 0 (size = 1 byte, lane = 0)
185 */
Wolfgang Denk647d3c32007-03-04 01:36:05 +0100186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
roy zangb825f152006-11-02 19:12:31 +0800188 I2C_CNTRL2) = (I2C_CNTRL2_START);
189
190 op_status = TSI108_I2C_TIMEOUT_ERR;
191
192 /* Wait until operation completed */
193 do {
roy zangee311212006-12-01 11:47:36 +0800194 /* Read I2C operation status */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
roy zangb825f152006-11-02 19:12:31 +0800196
Wolfgang Denk647d3c32007-03-04 01:36:05 +0100197 if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
198 if (0 == (temp &
roy zangb825f152006-11-02 19:12:31 +0800199 (I2C_CNTRL2_I2C_CFGERR |
200 I2C_CNTRL2_I2C_TO_ERR))) {
201 op_status = TSI108_I2C_SUCCESS;
202 } else {
203 /* report detected HW error */
204 op_status = TSI108_I2C_IF_ERROR;
205
roy zangee311212006-12-01 11:47:36 +0800206 DPRINT (("I2C HW error reported: 0x%02x\n", temp));
roy zangb825f152006-11-02 19:12:31 +0800207 }
208
209 break;
210 }
211
212 } while (to_count--);
213 } else {
214 op_status = TSI108_I2C_IF_BUSY;
215
roy zangee311212006-12-01 11:47:36 +0800216 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp));
roy zangb825f152006-11-02 19:12:31 +0800217 }
218
219 return op_status;
220}
221
roy zangee311212006-12-01 11:47:36 +0800222/*
roy zangb825f152006-11-02 19:12:31 +0800223 * I2C Write interface as defined in "include/i2c.h" :
224 * chip_addr: I2C chip address, range 0..127
225 * byte_addr: Memory or register address within the chip
226 * alen: Number of bytes to use for addr (typically 1, 2 for larger
227 * memories, 0 for register type devices with only one
228 * register)
229 * buffer: Pointer to data to be written
230 * len: How many bytes to write
231 *
232 * Returns: 0 on success, not 0 on failure
233 */
234
roy zangee311212006-12-01 11:47:36 +0800235int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer,
roy zangb825f152006-11-02 19:12:31 +0800236 int len)
237{
238 u32 op_status = TSI108_I2C_PARAM_ERR;
239
240 /* Check for valid I2C address */
241 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
242 while (len--) {
243 op_status =
roy zangee311212006-12-01 11:47:36 +0800244 i2c_write_byte (chip_addr, byte_addr++, buffer++);
roy zangb825f152006-11-02 19:12:31 +0800245
246 if (TSI108_I2C_SUCCESS != op_status) {
roy zangee311212006-12-01 11:47:36 +0800247 DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status, len));
roy zangb825f152006-11-02 19:12:31 +0800248
249 break;
250 }
251 }
252 }
253
254 return op_status;
255}
256
roy zangee311212006-12-01 11:47:36 +0800257/*
roy zangb825f152006-11-02 19:12:31 +0800258 * I2C interface function as defined in "include/i2c.h".
259 * Probe the given I2C chip address by reading single byte from offset 0.
260 * Returns 0 if a chip responded, not 0 on failure.
261 */
262
roy zangee311212006-12-01 11:47:36 +0800263int i2c_probe (uchar chip)
roy zangb825f152006-11-02 19:12:31 +0800264{
265 u32 tmp;
266
267 /*
268 * Try to read the first location of the chip.
269 * The Tsi108 HW doesn't support sending just the chip address
270 * and checkong for an <ACK> back.
271 */
Wolfgang Denk409ecdc2007-11-18 16:36:27 +0100272 return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
roy zangb825f152006-11-02 19:12:31 +0800273}
274
Jon Loeligercb51c0b2007-07-09 17:39:42 -0500275#endif