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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Álvaro Fernández Rojasbf9012b2017-05-16 18:39:03 +02002/*
3 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojasbf9012b2017-05-16 18:39:03 +02004 */
5
6#include <dt-bindings/clock/bcm6348-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/reset/bcm6348-reset.h>
9#include "skeleton.dtsi"
10
11/ {
12 compatible = "brcm,bcm6348";
13
Álvaro Fernández Rojasff159282018-01-23 17:15:00 +010014 aliases {
15 spi0 = &spi;
16 };
17
Álvaro Fernández Rojasbf9012b2017-05-16 18:39:03 +020018 cpus {
19 reg = <0xfffe0000 0x4>;
20 #address-cells = <1>;
21 #size-cells = <0>;
22 u-boot,dm-pre-reloc;
23
24 cpu@0 {
25 compatible = "brcm,bcm6348-cpu", "mips,mips4Kc";
26 device_type = "cpu";
27 reg = <0>;
28 u-boot,dm-pre-reloc;
29 };
30 };
31
32 clocks {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 u-boot,dm-pre-reloc;
37
38 periph_osc: periph-osc {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <50000000>;
42 u-boot,dm-pre-reloc;
43 };
44
45 periph_clk: periph-clk {
46 compatible = "brcm,bcm6345-clk";
47 reg = <0xfffe0004 0x4>;
48 #clock-cells = <1>;
49 };
50 };
51
52 pflash: nor@1fc00000 {
53 compatible = "cfi-flash";
54 reg = <0x1fc00000 0x2000000>;
55 bank-width = <2>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58
59 status = "disabled";
60 };
61
62 ubus {
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 u-boot,dm-pre-reloc;
67
68 pll_cntl: syscon@fffe0008 {
69 compatible = "syscon";
70 reg = <0xfffe0008 0x4>;
71 };
72
73 syscon-reboot {
74 compatible = "syscon-reboot";
75 regmap = <&pll_cntl>;
76 offset = <0x0>;
77 mask = <0x1>;
78 };
79
80 periph_rst: reset-controller@fffe0028 {
81 compatible = "brcm,bcm6345-reset";
82 reg = <0xfffe0028 0x4>;
83 #reset-cells = <1>;
84 };
85
86 wdt: watchdog@fffe021c {
87 compatible = "brcm,bcm6345-wdt";
88 reg = <0xfffe021c 0xc>;
89 clocks = <&periph_osc>;
90 };
91
92 wdt-reboot {
93 compatible = "wdt-reboot";
94 wdt = <&wdt>;
95 };
96
97 uart0: serial@fffe0300 {
98 compatible = "brcm,bcm6345-uart";
99 reg = <0xfffe0300 0x18>;
100 clocks = <&periph_osc>;
101
102 status = "disabled";
103 };
104
105 gpio1: gpio-controller@fffe0400 {
106 compatible = "brcm,bcm6345-gpio";
107 reg = <0xfffe0400 0x4>, <0xfffe0408 0x4>;
108 gpio-controller;
109 #gpio-cells = <2>;
110 ngpios = <5>;
111
112 status = "disabled";
113 };
114
115 gpio0: gpio-controller@fffe0404 {
116 compatible = "brcm,bcm6345-gpio";
117 reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>;
118 gpio-controller;
119 #gpio-cells = <2>;
120
121 status = "disabled";
122 };
123
Álvaro Fernández Rojasff159282018-01-23 17:15:00 +0100124 spi: spi@fffe0c00 {
125 compatible = "brcm,bcm6348-spi";
126 reg = <0xfffe0c00 0xc0>;
127 #address-cells = <1>;
128 #size-cells = <0>;
129 clocks = <&periph_clk BCM6348_CLK_SPI>;
130 resets = <&periph_rst BCM6348_RST_SPI>;
131 spi-max-frequency = <20000000>;
132 num-cs = <4>;
133
134 status = "disabled";
135 };
136
Álvaro Fernández Rojasd51aaf82018-02-04 11:18:25 +0100137 ohci: usb-controller@fffe1b00 {
138 compatible = "brcm,bcm6348-ohci", "generic-ohci";
139 reg = <0xfffe1b00 0x100>;
140 phys = <&usbh>;
141 big-endian;
142
143 status = "disabled";
144 };
145
146 usbh: usb-phy@fffe1c00 {
147 compatible = "brcm,bcm6348-usbh";
148 reg = <0xfffe1c00 0x4>;
149 #phy-cells = <0>;
150 clocks = <&periph_clk BCM6348_CLK_USBH>;
151 clock-names = "usbh";
152 resets = <&periph_rst BCM6348_RST_USBH>;
153
154 status = "disabled";
155 };
156
Álvaro Fernández Rojasbf9012b2017-05-16 18:39:03 +0200157 memory-controller@fffe2300 {
158 compatible = "brcm,bcm6338-mc";
159 reg = <0xfffe2300 0x38>;
160 u-boot,dm-pre-reloc;
161 };
162 };
163};