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Peng Fan2cd7f472020-05-03 22:19:46 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017~2020 NXP
4 *
5 */
6
7#include <config.h>
8#include <common.h>
9#include <asm/io.h>
10#include <asm/arch/clock.h>
11#include <asm/arch/sys_proto.h>
12#include <dm.h>
13#include <dm/device-internal.h>
14#include <dm/device.h>
15#include <errno.h>
16#include <fuse.h>
17#include <malloc.h>
18#include <thermal.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22#define SITES_MAX 16
Peng Fanfc8657b2020-05-03 22:19:47 +080023#define FLAGS_VER2 0x1
Peng Fan2cd7f472020-05-03 22:19:46 +080024
25#define TMR_DISABLE 0x0
26#define TMR_ME 0x80000000
27#define TMR_ALPF 0x0c000000
28#define TMTMIR_DEFAULT 0x00000002
29#define TIER_DISABLE 0x0
30
Peng Fanfc8657b2020-05-03 22:19:47 +080031#define TER_EN 0x80000000
32#define TER_ADC_PD 0x40000000
Peng Fan2cd7f472020-05-03 22:19:46 +080033/*
34 * i.MX TMU Registers
35 */
36struct imx_tmu_site_regs {
37 u32 tritsr; /* Immediate Temperature Site Register */
38 u32 tratsr; /* Average Temperature Site Register */
39 u8 res0[0x8];
40};
41
42struct imx_tmu_regs {
43 u32 tmr; /* Mode Register */
44 u32 tsr; /* Status Register */
45 u32 tmtmir; /* Temperature measurement interval Register */
46 u8 res0[0x14];
47 u32 tier; /* Interrupt Enable Register */
48 u32 tidr; /* Interrupt Detect Register */
49 u32 tiscr; /* Interrupt Site Capture Register */
50 u32 ticscr; /* Interrupt Critical Site Capture Register */
51 u8 res1[0x10];
52 u32 tmhtcrh; /* High Temperature Capture Register */
53 u32 tmhtcrl; /* Low Temperature Capture Register */
54 u8 res2[0x8];
55 u32 tmhtitr; /* High Temperature Immediate Threshold */
56 u32 tmhtatr; /* High Temperature Average Threshold */
57 u32 tmhtactr; /* High Temperature Average Crit Threshold */
58 u8 res3[0x24];
59 u32 ttcfgr; /* Temperature Configuration Register */
60 u32 tscfgr; /* Sensor Configuration Register */
61 u8 res4[0x78];
62 struct imx_tmu_site_regs site[SITES_MAX];
63 u8 res5[0x9f8];
64 u32 ipbrr0; /* IP Block Revision Register 0 */
65 u32 ipbrr1; /* IP Block Revision Register 1 */
66 u8 res6[0x310];
67 u32 ttr0cr; /* Temperature Range 0 Control Register */
68 u32 ttr1cr; /* Temperature Range 1 Control Register */
69 u32 ttr2cr; /* Temperature Range 2 Control Register */
70 u32 ttr3cr; /* Temperature Range 3 Control Register */
71};
72
Peng Fanfc8657b2020-05-03 22:19:47 +080073struct imx_tmu_regs_v2 {
74 u32 ter; /* TMU enable Register */
75 u32 tsr; /* Status Register */
76 u32 tier; /* Interrupt enable register */
77 u32 tidr; /* Interrupt detect register */
78 u32 tmhtitr; /* Monitor high temperature immediate threshold register */
79 u32 tmhtatr; /* Monitor high temperature average threshold register */
80 u32 tmhtactr; /* TMU monitor high temperature average critical threshold register */
81 u32 tscr; /* Sensor value capture register */
82 u32 tritsr; /* Report immediate temperature site register 0 */
83 u32 tratsr; /* Report average temperature site register 0 */
84 u32 tasr; /* Amplifier setting register */
85 u32 ttmc; /* Test MUX control */
86 u32 tcaliv;
87};
88
89union tmu_regs {
90 struct imx_tmu_regs regs_v1;
91 struct imx_tmu_regs_v2 regs_v2;
92};
93
Peng Fan2cd7f472020-05-03 22:19:46 +080094struct imx_tmu_plat {
95 int critical;
96 int alert;
97 int polling_delay;
98 int id;
99 bool zone_node;
Peng Fanfc8657b2020-05-03 22:19:47 +0800100 union tmu_regs *regs;
Peng Fan2cd7f472020-05-03 22:19:46 +0800101};
102
103static int read_temperature(struct udevice *dev, int *temp)
104{
105 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
Peng Fanfc8657b2020-05-03 22:19:47 +0800106 ulong drv_data = dev_get_driver_data(dev);
Peng Fan2cd7f472020-05-03 22:19:46 +0800107 u32 val;
108
109 do {
Peng Fanfc8657b2020-05-03 22:19:47 +0800110 if (drv_data & FLAGS_VER2) {
111 val = readl(&pdata->regs->regs_v2.tritsr);
112 else
113 val = readl(&pdata->regs->regs_v1.site[pdata->id].tritsr);
Peng Fan2cd7f472020-05-03 22:19:46 +0800114 } while (!(val & 0x80000000));
115
116 *temp = (val & 0xff) * 1000;
117
118 return 0;
119}
120
121int imx_tmu_get_temp(struct udevice *dev, int *temp)
122{
123 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
124 int cpu_tmp = 0;
125 int ret;
126
127 ret = read_temperature(dev, &cpu_tmp);
128 if (ret)
129 return ret;
130
131 while (cpu_tmp >= pdata->alert) {
132 printf("CPU Temperature (%dC) has beyond alert (%dC), close to critical (%dC)", cpu_tmp, pdata->alert, pdata->critical);
133 puts(" waiting...\n");
134 mdelay(pdata->polling_delay);
135 ret = read_temperature(dev, &cpu_tmp);
136 if (ret)
137 return ret;
138 }
139
140 *temp = cpu_tmp / 1000;
141
142 return 0;
143}
144
145static const struct dm_thermal_ops imx_tmu_ops = {
146 .get_temp = imx_tmu_get_temp,
147};
148
149static int imx_tmu_calibration(struct udevice *dev)
150{
151 int i, val, len, ret;
152 u32 range[4];
153 const fdt32_t *calibration;
154 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
Peng Fanfc8657b2020-05-03 22:19:47 +0800155 ulong drv_data = dev_get_driver_data(dev);
Peng Fan2cd7f472020-05-03 22:19:46 +0800156
157 debug("%s\n", __func__);
158
Peng Fanfc8657b2020-05-03 22:19:47 +0800159 if (drv_data & FLAGS_VER2)
160 return 0;
161
Peng Fan2cd7f472020-05-03 22:19:46 +0800162 ret = dev_read_u32_array(dev, "fsl,tmu-range", range, 4);
163 if (ret) {
164 printf("TMU: missing calibration range, ret = %d.\n", ret);
165 return ret;
166 }
167
168 /* Init temperature range registers */
Peng Fanfc8657b2020-05-03 22:19:47 +0800169 writel(range[0], &pdata->regs->regs_v1.ttr0cr);
170 writel(range[1], &pdata->regs->regs_v1.ttr1cr);
171 writel(range[2], &pdata->regs->regs_v1.ttr2cr);
172 writel(range[3], &pdata->regs->regs_v1.ttr3cr);
Peng Fan2cd7f472020-05-03 22:19:46 +0800173
174 calibration = dev_read_prop(dev, "fsl,tmu-calibration", &len);
175 if (!calibration || len % 8) {
176 printf("TMU: invalid calibration data.\n");
177 return -ENODEV;
178 }
179
180 for (i = 0; i < len; i += 8, calibration += 2) {
181 val = fdt32_to_cpu(*calibration);
Peng Fanfc8657b2020-05-03 22:19:47 +0800182 writel(val, &pdata->regs->regs_v1.ttcfgr);
Peng Fan2cd7f472020-05-03 22:19:46 +0800183 val = fdt32_to_cpu(*(calibration + 1));
Peng Fanfc8657b2020-05-03 22:19:47 +0800184 writel(val, &pdata->regs->regs_v1.tscfgr);
Peng Fan2cd7f472020-05-03 22:19:46 +0800185 }
186
187 return 0;
188}
189
Peng Fan84897402020-05-03 22:19:48 +0800190void __weak imx_tmu_arch_init(void *reg_base)
191{
192}
193
Peng Fanfc8657b2020-05-03 22:19:47 +0800194static void imx_tmu_init(struct udevice *dev)
Peng Fan2cd7f472020-05-03 22:19:46 +0800195{
Peng Fanfc8657b2020-05-03 22:19:47 +0800196 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
197 ulong drv_data = dev_get_driver_data(dev);
198
Peng Fan2cd7f472020-05-03 22:19:46 +0800199 debug("%s\n", __func__);
200
Peng Fanfc8657b2020-05-03 22:19:47 +0800201 if (drv_data & FLAGS_VER2) {
202 /* Disable monitoring */
203 writel(0x0, &pdata->regs->regs_v2.ter);
Peng Fan2cd7f472020-05-03 22:19:46 +0800204
Peng Fanfc8657b2020-05-03 22:19:47 +0800205 /* Disable interrupt, using polling instead */
206 writel(0x0, &pdata->regs->regs_v2.tier);
207 } else {
208 /* Disable monitoring */
209 writel(TMR_DISABLE, &pdata->regs->regs_v1.tmr);
Peng Fan2cd7f472020-05-03 22:19:46 +0800210
Peng Fanfc8657b2020-05-03 22:19:47 +0800211 /* Disable interrupt, using polling instead */
212 writel(TIER_DISABLE, &pdata->regs->regs_v1.tier);
213
214 /* Set update_interval */
215 writel(TMTMIR_DEFAULT, &pdata->regs->regs_v1.tmtmir);
216 }
Peng Fan84897402020-05-03 22:19:48 +0800217
218 imx_tmu_arch_init((void *)pdata->regs);
Peng Fan2cd7f472020-05-03 22:19:46 +0800219}
220
221static int imx_tmu_enable_msite(struct udevice *dev)
222{
223 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
Peng Fanfc8657b2020-05-03 22:19:47 +0800224 ulong drv_data = dev_get_driver_data(dev);
Peng Fan2cd7f472020-05-03 22:19:46 +0800225 u32 reg;
226
227 debug("%s\n", __func__);
228
229 if (!pdata->regs)
230 return -EIO;
231
Peng Fanfc8657b2020-05-03 22:19:47 +0800232 if (drv_data & FLAGS_VER2) {
233 reg = readl(&pdata->regs->regs_v2.ter);
234 reg &= ~TER_EN;
235 writel(reg, &pdata->regs->regs_v2.ter);
Peng Fan2cd7f472020-05-03 22:19:46 +0800236
Peng Fanfc8657b2020-05-03 22:19:47 +0800237 reg &= ~TER_ALPF;
238 reg |= 0x1;
239 writel(reg, &pdata->regs->regs_v2.ter);
Peng Fan2cd7f472020-05-03 22:19:46 +0800240
Peng Fanfc8657b2020-05-03 22:19:47 +0800241 /* Enable monitor */
242 reg |= TER_EN;
243 writel(reg, &pdata->regs->regs_v2.ter);
244 } else {
245 /* Clear the ME before setting MSITE and ALPF*/
246 reg = readl(&pdata->regs->regs_v1.tmr);
247 reg &= ~TMR_ME;
248 writel(reg, &pdata->regs->regs_v1.tmr);
249
250 reg |= 1 << (15 - pdata->id);
251 reg |= TMR_ALPF;
252 writel(reg, &pdata->regs->regs_v1.tmr);
253
254 /* Enable ME */
255 reg |= TMR_ME;
256 writel(reg, &pdata->regs->regs_v1.tmr);
257 }
Peng Fan2cd7f472020-05-03 22:19:46 +0800258
259 return 0;
260}
261
262static int imx_tmu_bind(struct udevice *dev)
263{
264 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
265 int ret;
266 ofnode node, offset;
267 const char *name;
268 const void *prop;
269
270 debug("%s dev name %s\n", __func__, dev->name);
271
272 prop = dev_read_prop(dev, "compatible", NULL);
273 if (!prop)
274 return 0;
275
276 pdata->zone_node = 1;
277
278 node = ofnode_path("/thermal-zones");
279 ofnode_for_each_subnode(offset, node) {
280 /* Bind the subnode to this driver */
281 name = ofnode_get_name(offset);
282
283 ret = device_bind_with_driver_data(dev, dev->driver, name,
284 dev->driver_data, offset,
285 NULL);
286 if (ret)
287 printf("Error binding driver '%s': %d\n",
288 dev->driver->name, ret);
289 }
290
291 return 0;
292}
293
294static int imx_tmu_parse_fdt(struct udevice *dev)
295{
296 struct imx_tmu_plat *pdata = dev_get_platdata(dev), *p_parent_data;
297 struct ofnode_phandle_args args;
298 ofnode trips_np;
299 int ret;
300
301 debug("%s dev name %s\n", __func__, dev->name);
302
303 if (pdata->zone_node) {
Peng Fanfc8657b2020-05-03 22:19:47 +0800304 pdata->regs = (union tmu_regs *)dev_read_addr_ptr(dev);
Peng Fan2cd7f472020-05-03 22:19:46 +0800305
306 if (!pdata->regs)
307 return -EINVAL;
308 return 0;
309 }
310
311 p_parent_data = dev_get_platdata(dev->parent);
312 if (p_parent_data->zone_node)
313 pdata->regs = p_parent_data->regs;
314
315 ret = dev_read_phandle_with_args(dev, "thermal-sensors",
316 "#thermal-sensor-cells",
317 0, 0, &args);
318 if (ret)
319 return ret;
320
321 if (!ofnode_equal(args.node, dev_ofnode(dev->parent)))
322 return -EFAULT;
323
324 if (args.args_count >= 1)
325 pdata->id = args.args[0];
326 else
327 pdata->id = 0;
328
329 debug("args.args_count %d, id %d\n", args.args_count, pdata->id);
330
331 pdata->polling_delay = dev_read_u32_default(dev, "polling-delay", 1000);
332
333 trips_np = ofnode_path("/thermal-zones/cpu-thermal/trips");
334 ofnode_for_each_subnode(trips_np, trips_np) {
335 const char *type;
336
337 type = ofnode_get_property(trips_np, "type", NULL);
338 if (!type)
339 continue;
340 if (!strcmp(type, "critical"))
341 pdata->critical = ofnode_read_u32_default(trips_np, "temperature", 85);
342 else if (strcmp(type, "passive") == 0)
343 pdata->alert = ofnode_read_u32_default(trips_np, "temperature", 80);
344 else
345 continue;
346 }
347
348 debug("id %d polling_delay %d, critical %d, alert %d\n",
349 pdata->id, pdata->polling_delay, pdata->critical, pdata->alert);
350
351 return 0;
352}
353
354static int imx_tmu_probe(struct udevice *dev)
355{
356 struct imx_tmu_plat *pdata = dev_get_platdata(dev);
357 int ret;
358
359 ret = imx_tmu_parse_fdt(dev);
360 if (ret) {
361 printf("Error in parsing TMU FDT %d\n", ret);
362 return ret;
363 }
364
365 if (pdata->zone_node) {
Peng Fanfc8657b2020-05-03 22:19:47 +0800366 imx_tmu_init(dev);
Peng Fan2cd7f472020-05-03 22:19:46 +0800367 imx_tmu_calibration(dev);
368 } else {
369 imx_tmu_enable_msite(dev);
370 }
371
372 return 0;
373}
374
375static const struct udevice_id imx_tmu_ids[] = {
376 { .compatible = "fsl,imx8mq-tmu", },
Peng Fanfc8657b2020-05-03 22:19:47 +0800377 { .compatible = "fsl,imx8mm-tmu", .data = FLAGS_VER2, },
Peng Fan2cd7f472020-05-03 22:19:46 +0800378 { }
379};
380
381U_BOOT_DRIVER(imx_tmu) = {
382 .name = "imx_tmu",
383 .id = UCLASS_THERMAL,
384 .ops = &imx_tmu_ops,
385 .of_match = imx_tmu_ids,
386 .bind = imx_tmu_bind,
387 .probe = imx_tmu_probe,
388 .platdata_auto_alloc_size = sizeof(struct imx_tmu_plat),
389 .flags = DM_FLAG_PRE_RELOC,
390};