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Stefan Roese887e2ec2006-09-07 11:51:23 +02001/*
2 * Overview:
3 * Platform independend driver for NDFC (NanD Flash Controller)
4 * integrated into EP440 cores
5 *
Stefan Roese91da09c2007-06-01 15:15:12 +02006 * (C) Copyright 2006-2007
Stefan Roese887e2ec2006-09-07 11:51:23 +02007 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
9 * Based on original work by
10 * Thomas Gleixner
11 * Copyright 2006 IBM
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 */
31
32#include <common.h>
33
Jean-Christophe PLAGNIOL-VILLARDcc4a0ce2008-08-13 01:40:43 +020034#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
Stefan Roese2d658962006-09-07 13:09:53 +020035 (defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
Stefan Roese6f3dfc12007-05-22 12:46:10 +020036 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
Stefan Roese2801b2d2008-03-11 15:05:50 +010037 defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \
38 defined(CONFIG_460EX) || defined(CONFIG_460GT))
Stefan Roese887e2ec2006-09-07 11:51:23 +020039
40#include <nand.h>
41#include <linux/mtd/ndfc.h>
Stefan Roese91da09c2007-06-01 15:15:12 +020042#include <linux/mtd/nand_ecc.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020043#include <asm/processor.h>
Stefan Roese91da09c2007-06-01 15:15:12 +020044#include <asm/io.h>
Stefan Roese6f3dfc12007-05-22 12:46:10 +020045#include <ppc4xx.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020046
Stefan Roese3df2ece2008-01-05 16:47:58 +010047/*
48 * We need to store the info, which chip-select (CS) is used for the
49 * chip number. For example on Sequoia NAND chip #0 uses
50 * CS #3.
51 */
52static int ndfc_cs[NDFC_MAX_BANKS];
Stefan Roese887e2ec2006-09-07 11:51:23 +020053
William Juulcfa460a2007-10-31 13:53:06 +010054static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
Stefan Roese887e2ec2006-09-07 11:51:23 +020055{
William Juul5e1dae52007-11-09 13:32:30 +010056 struct nand_chip *this = mtd->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +010057 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +020058
Stefan Roese3df2ece2008-01-05 16:47:58 +010059 if (cmd == NAND_CMD_NONE)
60 return;
Stefan Roese887e2ec2006-09-07 11:51:23 +020061
Stefan Roese3df2ece2008-01-05 16:47:58 +010062 if (ctrl & NAND_CLE)
63 out_8((u8 *)(base + NDFC_CMD), cmd & 0xFF);
64 else
65 out_8((u8 *)(base + NDFC_ALE), cmd & 0xFF);
Stefan Roese887e2ec2006-09-07 11:51:23 +020066}
67
68static int ndfc_dev_ready(struct mtd_info *mtdinfo)
69{
Wolfgang Denk511d0c72006-10-09 00:42:01 +020070 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +010071 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +020072
Stefan Roese3df2ece2008-01-05 16:47:58 +010073 return (in_be32((u32 *)(base + NDFC_STAT)) & NDFC_STAT_IS_READY);
Stefan Roese887e2ec2006-09-07 11:51:23 +020074}
75
Stefan Roese91da09c2007-06-01 15:15:12 +020076static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode)
77{
78 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +010079 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese91da09c2007-06-01 15:15:12 +020080 u32 ccr;
81
82 ccr = in_be32((u32 *)(base + NDFC_CCR));
83 ccr |= NDFC_CCR_RESET_ECC;
84 out_be32((u32 *)(base + NDFC_CCR), ccr);
85}
86
87static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
88 const u_char *dat, u_char *ecc_code)
89{
90 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +010091 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese91da09c2007-06-01 15:15:12 +020092 u32 ecc;
93 u8 *p = (u8 *)&ecc;
94
95 ecc = in_be32((u32 *)(base + NDFC_ECC));
96
97 /* The NDFC uses Smart Media (SMC) bytes order
98 */
Stefan Roeseff02f132008-02-01 09:38:29 +010099 ecc_code[0] = p[1];
100 ecc_code[1] = p[2];
Stefan Roese91da09c2007-06-01 15:15:12 +0200101 ecc_code[2] = p[3];
102
103 return 0;
104}
Stefan Roese887e2ec2006-09-07 11:51:23 +0200105
106/*
107 * Speedups for buffer read/write/verify
108 *
109 * NDFC allows 32bit read/write of data. So we can speed up the buffer
110 * functions. No further checking, as nand_base will always read/write
111 * page aligned.
112 */
113static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)
114{
Wolfgang Denk511d0c72006-10-09 00:42:01 +0200115 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +0100116 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200117 uint32_t *p = (uint32_t *) buf;
118
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200119 for (;len > 0; len -= 4)
Stefan Roese91da09c2007-06-01 15:15:12 +0200120 *p++ = in_be32((u32 *)(base + NDFC_DATA));
Stefan Roese887e2ec2006-09-07 11:51:23 +0200121}
122
Stefan Roese91da09c2007-06-01 15:15:12 +0200123#ifndef CONFIG_NAND_SPL
124/*
125 * Don't use these speedup functions in NAND boot image, since the image
126 * has to fit into 4kByte.
127 */
Stefan Roese887e2ec2006-09-07 11:51:23 +0200128static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
129{
Wolfgang Denk511d0c72006-10-09 00:42:01 +0200130 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +0100131 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200132 uint32_t *p = (uint32_t *) buf;
133
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200134 for (; len > 0; len -= 4)
Stefan Roese91da09c2007-06-01 15:15:12 +0200135 out_be32((u32 *)(base + NDFC_DATA), *p++);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200136}
137
138static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
139{
Wolfgang Denk511d0c72006-10-09 00:42:01 +0200140 struct nand_chip *this = mtdinfo->priv;
Stefan Roese3df2ece2008-01-05 16:47:58 +0100141 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200142 uint32_t *p = (uint32_t *) buf;
143
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200144 for (; len > 0; len -= 4)
Stefan Roese91da09c2007-06-01 15:15:12 +0200145 if (*p++ != in_be32((u32 *)(base + NDFC_DATA)))
Stefan Roese887e2ec2006-09-07 11:51:23 +0200146 return -1;
147
148 return 0;
149}
150#endif /* #ifndef CONFIG_NAND_SPL */
151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#ifndef CONFIG_SYS_NAND_BCR
153#define CONFIG_SYS_NAND_BCR 0x80002222
Wolfgang Ocker52aef8f2008-08-26 19:55:23 +0200154#endif
155
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200156void board_nand_select_device(struct nand_chip *nand, int chip)
157{
Stefan Roese7ade0c62006-10-24 18:06:48 +0200158 /*
159 * Don't use "chip" to address the NAND device,
160 * generate the cs from the address where it is encoded.
161 */
Stefan Roese3df2ece2008-01-05 16:47:58 +0100162 ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
163 int cs = ndfc_cs[chip];
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200164
165 /* Set NandFlash Core Configuration Register */
Stefan Roese91da09c2007-06-01 15:15:12 +0200166 /* 1 col x 2 rows */
167 out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24));
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168 out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), CONFIG_SYS_NAND_BCR);
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200169}
170
Stefan Roesec2b4b2e2008-08-29 11:56:49 +0200171static void ndfc_select_chip(struct mtd_info *mtd, int chip)
172{
173 /*
174 * Nothing to do here!
175 */
176}
177
Heiko Schocherfa230442006-12-21 17:17:02 +0100178int board_nand_init(struct nand_chip *nand)
Stefan Roese887e2ec2006-09-07 11:51:23 +0200179{
Stefan Roese7ade0c62006-10-24 18:06:48 +0200180 int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
Stefan Roese3df2ece2008-01-05 16:47:58 +0100181 ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
182 static int chip = 0;
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200183
Stefan Roese3df2ece2008-01-05 16:47:58 +0100184 /*
185 * Save chip-select for this chip #
186 */
187 ndfc_cs[chip] = cs;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200188
Stefan Roese3df2ece2008-01-05 16:47:58 +0100189 /*
190 * Select required NAND chip in NDFC
191 */
192 board_nand_select_device(nand, chip);
193
194 nand->IO_ADDR_R = (void __iomem *)(base + NDFC_DATA);
195 nand->IO_ADDR_W = (void __iomem *)(base + NDFC_DATA);
196 nand->cmd_ctrl = ndfc_hwcontrol;
197 nand->chip_delay = 50;
198 nand->read_buf = ndfc_read_buf;
199 nand->dev_ready = ndfc_dev_ready;
William Juul5e1dae52007-11-09 13:32:30 +0100200 nand->ecc.correct = nand_correct_data;
201 nand->ecc.hwctl = ndfc_enable_hwecc;
202 nand->ecc.calculate = ndfc_calculate_ecc;
203 nand->ecc.mode = NAND_ECC_HW;
204 nand->ecc.size = 256;
205 nand->ecc.bytes = 3;
Stefan Roesec2b4b2e2008-08-29 11:56:49 +0200206 nand->select_chip = ndfc_select_chip;
Stefan Roese91da09c2007-06-01 15:15:12 +0200207
Stefan Roese887e2ec2006-09-07 11:51:23 +0200208#ifndef CONFIG_NAND_SPL
209 nand->write_buf = ndfc_write_buf;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200210 nand->verify_buf = ndfc_verify_buf;
211#else
212 /*
213 * Setup EBC (CS0 only right now)
214 */
Stefan Roese6f3dfc12007-05-22 12:46:10 +0200215 mtebc(EBC0_CFG, 0xb8400000);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200216
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200217 mtebc(pb0cr, CONFIG_SYS_EBC_PB0CR);
218 mtebc(pb0ap, CONFIG_SYS_EBC_PB0AP);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200219#endif
220
Stefan Roese3df2ece2008-01-05 16:47:58 +0100221 chip++;
Stefan Roesedbbd1252007-10-05 17:10:59 +0200222
Heiko Schocherfa230442006-12-21 17:17:02 +0100223 return 0;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200224}
225
226#endif