blob: ed7840f94b67e4e6bb30a1a5176c0162eea2436d [file] [log] [blame]
Mark Kettenis3dfef532021-10-23 16:58:06 +02001// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * Apple T8103 "M1" SoC
4 *
5 * Other names: H13G, "Tonga"
6 *
7 * Copyright The Asahi Linux Contributors
8 */
9
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/apple-aic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/pinctrl/apple.h>
Mark Kettenis3dfef532021-10-23 16:58:06 +020014
15/ {
16 compatible = "apple,t8103", "apple,arm-platform";
17
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 cpus {
22 #address-cells = <2>;
23 #size-cells = <0>;
24
25 cpu0: cpu@0 {
26 compatible = "apple,icestorm";
27 device_type = "cpu";
28 reg = <0x0 0x0>;
29 enable-method = "spin-table";
30 cpu-release-addr = <0 0>; /* To be filled by loader */
31 };
32
33 cpu1: cpu@1 {
34 compatible = "apple,icestorm";
35 device_type = "cpu";
36 reg = <0x0 0x1>;
37 enable-method = "spin-table";
38 cpu-release-addr = <0 0>; /* To be filled by loader */
39 };
40
41 cpu2: cpu@2 {
42 compatible = "apple,icestorm";
43 device_type = "cpu";
44 reg = <0x0 0x2>;
45 enable-method = "spin-table";
46 cpu-release-addr = <0 0>; /* To be filled by loader */
47 };
48
49 cpu3: cpu@3 {
50 compatible = "apple,icestorm";
51 device_type = "cpu";
52 reg = <0x0 0x3>;
53 enable-method = "spin-table";
54 cpu-release-addr = <0 0>; /* To be filled by loader */
55 };
56
57 cpu4: cpu@10100 {
58 compatible = "apple,firestorm";
59 device_type = "cpu";
60 reg = <0x0 0x10100>;
61 enable-method = "spin-table";
62 cpu-release-addr = <0 0>; /* To be filled by loader */
63 };
64
65 cpu5: cpu@10101 {
66 compatible = "apple,firestorm";
67 device_type = "cpu";
68 reg = <0x0 0x10101>;
69 enable-method = "spin-table";
70 cpu-release-addr = <0 0>; /* To be filled by loader */
71 };
72
73 cpu6: cpu@10102 {
74 compatible = "apple,firestorm";
75 device_type = "cpu";
76 reg = <0x0 0x10102>;
77 enable-method = "spin-table";
78 cpu-release-addr = <0 0>; /* To be filled by loader */
79 };
80
81 cpu7: cpu@10103 {
82 compatible = "apple,firestorm";
83 device_type = "cpu";
84 reg = <0x0 0x10103>;
85 enable-method = "spin-table";
86 cpu-release-addr = <0 0>; /* To be filled by loader */
87 };
88 };
89
90 timer {
91 compatible = "arm,armv8-timer";
92 interrupt-parent = <&aic>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +010093 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
94 interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
95 <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
96 <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
97 <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
Mark Kettenis3dfef532021-10-23 16:58:06 +020098 };
99
100 clkref: clock-ref {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <24000000>;
104 clock-output-names = "clkref";
105 };
106
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100107 clk_120m: clock-120m {
108 compatible = "fixed-clock";
109 #clock-cells = <0>;
110 clock-frequency = <120000000>;
111 clock-output-names = "clk_120m";
112 };
113
Mark Kettenis3dfef532021-10-23 16:58:06 +0200114 soc {
115 compatible = "simple-bus";
116 #address-cells = <2>;
117 #size-cells = <2>;
118
119 ranges;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200120 nonposted-mmio;
121
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100122 i2c0: i2c@235010000 {
123 compatible = "apple,t8103-i2c", "apple,i2c";
124 reg = <0x2 0x35010000 0x0 0x4000>;
125 clocks = <&clkref>;
126 interrupt-parent = <&aic>;
127 interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
128 pinctrl-0 = <&i2c0_pins>;
129 pinctrl-names = "default";
130 #address-cells = <0x1>;
131 #size-cells = <0x0>;
132 power-domains = <&ps_i2c0>;
133 };
134
135 i2c1: i2c@235014000 {
136 compatible = "apple,t8103-i2c", "apple,i2c";
137 reg = <0x2 0x35014000 0x0 0x4000>;
138 clocks = <&clkref>;
139 interrupt-parent = <&aic>;
140 interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
141 pinctrl-0 = <&i2c1_pins>;
142 pinctrl-names = "default";
143 #address-cells = <0x1>;
144 #size-cells = <0x0>;
145 power-domains = <&ps_i2c1>;
146 };
147
148 i2c2: i2c@235018000 {
149 compatible = "apple,t8103-i2c", "apple,i2c";
150 reg = <0x2 0x35018000 0x0 0x4000>;
151 clocks = <&clkref>;
152 interrupt-parent = <&aic>;
153 interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
154 pinctrl-0 = <&i2c2_pins>;
155 pinctrl-names = "default";
156 #address-cells = <0x1>;
157 #size-cells = <0x0>;
158 power-domains = <&ps_i2c2>;
159 status = "disabled"; /* not used in all devices */
160 };
161
162 i2c3: i2c@23501c000 {
163 compatible = "apple,t8103-i2c", "apple,i2c";
164 reg = <0x2 0x3501c000 0x0 0x4000>;
165 clocks = <&clkref>;
166 interrupt-parent = <&aic>;
167 interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
168 pinctrl-0 = <&i2c3_pins>;
169 pinctrl-names = "default";
170 #address-cells = <0x1>;
171 #size-cells = <0x0>;
172 power-domains = <&ps_i2c3>;
173 };
174
175 i2c4: i2c@235020000 {
176 compatible = "apple,t8103-i2c", "apple,i2c";
177 reg = <0x2 0x35020000 0x0 0x4000>;
178 clocks = <&clkref>;
179 interrupt-parent = <&aic>;
180 interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
181 pinctrl-0 = <&i2c4_pins>;
182 pinctrl-names = "default";
183 #address-cells = <0x1>;
184 #size-cells = <0x0>;
185 power-domains = <&ps_i2c4>;
186 status = "disabled"; /* only used in J293 */
187 };
188
189 spi3: spi@23510c000 {
190 compatible = "apple,t8103-spi", "apple,spi";
191 reg = <0x2 0x3510c000 0x0 0x4000>;
192 interrupt-parent = <&aic>;
193 interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
194 clocks = <&clk_120m>;
195 pinctrl-0 = <&spi3_pins>;
196 pinctrl-names = "default";
197 power-domains = <&ps_spi3>;
198 #address-cells = <1>;
199 #size-cells = <0>;
200 status = "disabled"; /* only used in J293/J313 */
201 };
202
Mark Kettenis3dfef532021-10-23 16:58:06 +0200203 serial0: serial@235200000 {
204 compatible = "apple,s5l-uart";
205 reg = <0x2 0x35200000 0x0 0x1000>;
206 reg-io-width = <4>;
207 interrupt-parent = <&aic>;
208 interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100209 /*
210 * TODO: figure out the clocking properly, there may
211 * be a third selectable clock.
212 */
213 clocks = <&clkref>, <&clkref>;
214 clock-names = "uart", "clk_uart_baud0";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200215 power-domains = <&ps_uart0>;
216 status = "disabled";
217 };
218
219 serial2: serial@235208000 {
220 compatible = "apple,s5l-uart";
221 reg = <0x2 0x35208000 0x0 0x1000>;
222 reg-io-width = <4>;
223 interrupt-parent = <&aic>;
224 interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100225 clocks = <&clkref>, <&clkref>;
226 clock-names = "uart", "clk_uart_baud0";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200227 power-domains = <&ps_uart2>;
228 status = "disabled";
229 };
230
231 aic: interrupt-controller@23b100000 {
232 compatible = "apple,t8103-aic", "apple,aic";
233 #interrupt-cells = <3>;
234 interrupt-controller;
235 reg = <0x2 0x3b100000 0x0 0x8000>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100236 power-domains = <&ps_aic>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200237 };
238
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100239 pmgr: power-management@23b700000 {
Mark Kettenis3dfef532021-10-23 16:58:06 +0200240 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
241 #address-cells = <1>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100242 #size-cells = <1>;
243 reg = <0x2 0x3b700000 0 0x14000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200244 };
245
246 pinctrl_ap: pinctrl@23c100000 {
247 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
248 reg = <0x2 0x3c100000 0x0 0x100000>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100249 power-domains = <&ps_gpio>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200250
251 gpio-controller;
252 #gpio-cells = <2>;
253 gpio-ranges = <&pinctrl_ap 0 0 212>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100254 apple,npins = <212>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200255
256 interrupt-controller;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100257 #interrupt-cells = <2>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200258 interrupt-parent = <&aic>;
259 interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
260 <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
261 <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
262 <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
263 <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
264 <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
265 <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
266
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100267 i2c0_pins: i2c0-pins {
268 pinmux = <APPLE_PINMUX(192, 1)>,
269 <APPLE_PINMUX(188, 1)>;
270 };
271
272 i2c1_pins: i2c1-pins {
273 pinmux = <APPLE_PINMUX(201, 1)>,
274 <APPLE_PINMUX(199, 1)>;
275 };
276
277 i2c2_pins: i2c2-pins {
278 pinmux = <APPLE_PINMUX(163, 1)>,
279 <APPLE_PINMUX(162, 1)>;
280 };
281
282 i2c3_pins: i2c3-pins {
283 pinmux = <APPLE_PINMUX(73, 1)>,
284 <APPLE_PINMUX(72, 1)>;
285 };
286
287 i2c4_pins: i2c4-pins {
288 pinmux = <APPLE_PINMUX(135, 1)>,
289 <APPLE_PINMUX(134, 1)>;
290 };
291
292 spi3_pins: spi3-pins {
293 pinmux = <APPLE_PINMUX(46, 1)>,
294 <APPLE_PINMUX(47, 1)>,
295 <APPLE_PINMUX(48, 1)>,
296 <APPLE_PINMUX(49, 1)>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200297 };
298
299 pcie_pins: pcie-pins {
300 pinmux = <APPLE_PINMUX(150, 1)>,
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100301 <APPLE_PINMUX(151, 1)>,
Mark Kettenis3dfef532021-10-23 16:58:06 +0200302 <APPLE_PINMUX(32, 1)>;
303 };
304 };
305
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100306 spmi: spmi@23d0d9300 {
307 compatible = "apple,t8103-spmi", "apple,spmi";
308 reg = <0x2 0x3d0d9300 0x0 0x100>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200309 interrupt-parent = <&aic>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100310 interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
311 #address-cells = <2>;
312 #size-cells = <0>;
313 status = "disabled";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200314 };
315
316 pinctrl_nub: pinctrl@23d1f0000 {
317 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
318 reg = <0x2 0x3d1f0000 0x0 0x4000>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100319 power-domains = <&ps_nub_gpio>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200320
321 gpio-controller;
322 #gpio-cells = <2>;
323 gpio-ranges = <&pinctrl_nub 0 0 23>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100324 apple,npins = <23>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200325
326 interrupt-controller;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100327 #interrupt-cells = <2>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200328 interrupt-parent = <&aic>;
329 interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
330 <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
331 <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
332 <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
333 <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
334 <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
335 <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
336 };
337
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100338 pmgr_mini: power-management@23d280000 {
339 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
340 #address-cells = <1>;
341 #size-cells = <1>;
342 reg = <0x2 0x3d280000 0 0x4000>;
343 };
344
Mark Kettenisb0e6c732022-01-12 19:55:16 +0100345 wdt: watchdog@23d2b0000 {
346 compatible = "apple,t8103-wdt", "apple,wdt";
347 reg = <0x2 0x3d2b0000 0x0 0x4000>;
348 clocks = <&clkref>;
349 interrupt-parent = <&aic>;
350 interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
351 };
352
Mark Kettenis3dfef532021-10-23 16:58:06 +0200353 pinctrl_smc: pinctrl@23e820000 {
354 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
355 reg = <0x2 0x3e820000 0x0 0x4000>;
356
357 gpio-controller;
358 #gpio-cells = <2>;
359 gpio-ranges = <&pinctrl_smc 0 0 16>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100360 apple,npins = <16>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200361
362 interrupt-controller;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100363 #interrupt-cells = <2>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200364 interrupt-parent = <&aic>;
365 interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
366 <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
367 <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
368 <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
369 <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
370 <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
371 <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
372 };
373
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100374 smc_mbox: mbox@23e408000 {
375 compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
376 reg = <0x2 0x3e408000 0x0 0x4000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200377 interrupt-parent = <&aic>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100378 interrupts = <AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH>,
379 <AIC_IRQ 401 IRQ_TYPE_LEVEL_HIGH>,
380 <AIC_IRQ 402 IRQ_TYPE_LEVEL_HIGH>,
381 <AIC_IRQ 403 IRQ_TYPE_LEVEL_HIGH>;
382 interrupt-names = "send-empty", "send-not-empty",
383 "recv-empty", "recv-not-empty";
384 #mbox-cells = <0>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200385 };
386
387 smc: smc@23e050000 {
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100388 compatible = "apple,smc";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200389 reg = <0x2 0x3e050000 0x0 0x4000>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100390 mboxes = <&smc_mbox>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200391 gpio-controller;
392 #gpio-cells = <2>;
393 gpio-13 = <0x00800000>;
394 };
395
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100396 pinctrl_aop: pinctrl@24a820000 {
397 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
398 reg = <0x2 0x4a820000 0x0 0x4000>;
399
400 gpio-controller;
401 #gpio-cells = <2>;
402 gpio-ranges = <&pinctrl_aop 0 0 42>;
403 apple,npins = <42>;
404
405 interrupt-controller;
406 #interrupt-cells = <2>;
407 interrupt-parent = <&aic>;
408 interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
409 <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
410 <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
411 <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
412 <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
413 <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
414 <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
415 };
416
417 ans_mbox: mbox@277408000 {
418 compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
419 reg = <0x2 0x77408000 0x0 0x4000>;
420 interrupt-parent = <&aic>;
421 interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
422 <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
423 <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
424 <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
425 interrupt-names = "send-empty", "send-not-empty",
426 "recv-empty", "recv-not-empty";
427 #mbox-cells = <0>;
428 power-domains = <&ps_ans2>;
429 };
430
431 sart: sart@27bc50000 {
432 compatible = "apple,t8103-sart", "apple,sart2";
433 reg = <0x2 0x7bc50000 0x0 0x10000>;
434 power-domains = <&ps_ans2>;
435 };
436
437 nvme@27bcc0000 {
438 compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
439 reg = <0x2 0x7bcc0000 0x0 0x40000>,
440 <0x2 0x77400000 0x0 0x4000>;
441 reg-names = "nvme", "ans";
442 interrupt-parent = <&aic>;
443 interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
444 mboxes = <&ans_mbox>;
445 apple,sart = <&sart>;
446 power-domains = <&ps_ans2>;
447 resets = <&ps_ans2>;
448 };
449
450 dwc3_0: usb@382280000 {
451 compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
452 reg = <0x3 0x82280000 0x0 0x100000>;
453 interrupt-parent = <&aic>;
454 interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
455 usb-role-switch;
456 role-switch-default-mode = "host";
457 iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
458 power-domains = <&ps_atc0_usb>;
459 };
460
461 dwc3_0_dart_0: iommu@382f00000 {
462 compatible = "apple,t8103-dart";
463 reg = <0x3 0x82f00000 0x0 0x4000>;
464 interrupt-parent = <&aic>;
465 interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
466 #iommu-cells = <1>;
467 power-domains = <&ps_atc0_usb>;
468 };
469
470 dwc3_0_dart_1: iommu@382f80000 {
471 compatible = "apple,t8103-dart";
472 reg = <0x3 0x82f80000 0x0 0x4000>;
473 interrupt-parent = <&aic>;
474 interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
475 #iommu-cells = <1>;
476 power-domains = <&ps_atc0_usb>;
477 };
478
479 dwc3_1: usb@502280000 {
480 compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
481 reg = <0x5 0x02280000 0x0 0x100000>;
482 interrupt-parent = <&aic>;
483 interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
484 usb-role-switch;
485 role-switch-default-mode = "host";
486 iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
487 power-domains = <&ps_atc1_usb>;
488 };
489
490 dwc3_1_dart_0: iommu@502f00000 {
491 compatible = "apple,t8103-dart";
492 reg = <0x5 0x02f00000 0x0 0x4000>;
493 interrupt-parent = <&aic>;
494 interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
495 #iommu-cells = <1>;
496 power-domains = <&ps_atc1_usb>;
497 };
498
499 dwc3_1_dart_1: iommu@502f80000 {
500 compatible = "apple,t8103-dart";
501 reg = <0x5 0x02f80000 0x0 0x4000>;
502 interrupt-parent = <&aic>;
503 interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
504 #iommu-cells = <1>;
505 power-domains = <&ps_atc1_usb>;
506 };
507
508 pcie0_dart_0: dart@681008000 {
509 compatible = "apple,t8103-dart";
510 reg = <0x6 0x81008000 0x0 0x4000>;
511 #iommu-cells = <1>;
512 interrupt-parent = <&aic>;
513 interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
514 power-domains = <&ps_apcie_gp>;
515 };
516
517 pcie0_dart_1: dart@682008000 {
518 compatible = "apple,t8103-dart";
519 reg = <0x6 0x82008000 0x0 0x4000>;
520 #iommu-cells = <1>;
521 interrupt-parent = <&aic>;
522 interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
523 power-domains = <&ps_apcie_gp>;
524 };
525
526 pcie0_dart_2: dart@683008000 {
527 compatible = "apple,t8103-dart";
528 reg = <0x6 0x83008000 0x0 0x4000>;
529 #iommu-cells = <1>;
530 interrupt-parent = <&aic>;
531 interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
532 power-domains = <&ps_apcie_gp>;
533 };
534
Mark Kettenis3dfef532021-10-23 16:58:06 +0200535 pcie0: pcie@690000000 {
536 compatible = "apple,t8103-pcie", "apple,pcie";
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100537 device_type = "pci";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200538
539 reg = <0x6 0x90000000 0x0 0x1000000>,
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100540 <0x6 0x80000000 0x0 0x100000>,
541 <0x6 0x81000000 0x0 0x4000>,
542 <0x6 0x82000000 0x0 0x4000>,
543 <0x6 0x83000000 0x0 0x4000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200544 reg-names = "config", "rc", "port0", "port1", "port2";
545
546 interrupt-parent = <&aic>;
547 interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
548 <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
549 <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
550
551 msi-controller;
552 msi-parent = <&pcie0>;
553 msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
554
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100555
Mark Kettenis3dfef532021-10-23 16:58:06 +0200556 iommu-map = <0x100 &pcie0_dart_0 1 1>,
557 <0x200 &pcie0_dart_1 1 1>,
558 <0x300 &pcie0_dart_2 1 1>;
559 iommu-map-mask = <0xff00>;
560
561 bus-range = <0 3>;
562 #address-cells = <3>;
563 #size-cells = <2>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100564 ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
565 <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200566
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100567 power-domains = <&ps_apcie_gp>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200568 pinctrl-0 = <&pcie_pins>;
569 pinctrl-names = "default";
570
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100571 port00: pci@0,0 {
572 device_type = "pci";
573 reg = <0x0 0x0 0x0 0x0 0x0>;
574 reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
575
576 #address-cells = <3>;
577 #size-cells = <2>;
578 ranges;
579
580 interrupt-controller;
581 #interrupt-cells = <1>;
582
583 interrupt-map-mask = <0 0 0 7>;
584 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
585 <0 0 0 2 &port00 0 0 0 1>,
586 <0 0 0 3 &port00 0 0 0 2>,
587 <0 0 0 4 &port00 0 0 0 3>;
588 };
589
590 port01: pci@1,0 {
591 device_type = "pci";
592 reg = <0x800 0x0 0x0 0x0 0x0>;
593 reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
594
595 #address-cells = <3>;
596 #size-cells = <2>;
597 ranges;
598
599 interrupt-controller;
600 #interrupt-cells = <1>;
601
602 interrupt-map-mask = <0 0 0 7>;
603 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
604 <0 0 0 2 &port01 0 0 0 1>,
605 <0 0 0 3 &port01 0 0 0 2>,
606 <0 0 0 4 &port01 0 0 0 3>;
607 };
608
609 port02: pci@2,0 {
610 device_type = "pci";
611 reg = <0x1000 0x0 0x0 0x0 0x0>;
612 reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
613
614 #address-cells = <3>;
615 #size-cells = <2>;
616 ranges;
617
618 interrupt-controller;
619 #interrupt-cells = <1>;
620
621 interrupt-map-mask = <0 0 0 7>;
622 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
623 <0 0 0 2 &port02 0 0 0 1>,
624 <0 0 0 3 &port02 0 0 0 2>,
625 <0 0 0 4 &port02 0 0 0 3>;
626 };
Mark Kettenis3dfef532021-10-23 16:58:06 +0200627 };
628
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100629 dart_sio: iommu@235004000 {
630 compatible = "apple,t8103-dart", "apple,dart";
631 reg = <0x2 0x35004000 0x0 0x4000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200632 interrupt-parent = <&aic>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100633 interrupts = <AIC_IRQ 635 IRQ_TYPE_LEVEL_HIGH>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200634 #iommu-cells = <1>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100635 power-domains = <&ps_sio_cpu>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200636 };
637
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100638 nco_inp: clock-ref {
639 compatible = "fixed-factor-clock";
640 clocks = <&clkref>;
641 #clock-cells = <0>;
642 clock-mult = <75>;
643 clock-div = <2>; // 24 MHz * (75/2) = 900 MHz
644 clock-output-names = "nco_inp";
Mark Kettenis3dfef532021-10-23 16:58:06 +0200645 };
646
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100647 nco: nco@23b044000 {
648 compatible = "apple,t8103-nco", "apple,nco";
649 reg = <0x2 0x3b044000 0x0 0x14000>;
650 clocks = <&nco_inp>;
651 #clock-cells = <1>;
652 apple,nchannels = <5>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200653 };
654
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100655 admac: dma-controller@238200000 {
656 compatible = "apple,t8103-admac", "apple,admac";
657 reg = <0x2 0x38200000 0x0 0x34000>;
658 dma-channels = <12>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200659 interrupt-parent = <&aic>;
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100660 interrupts = <AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>;
661 #dma-cells = <1>;
662 iommus = <&dart_sio 2>;
663 power-domains = <&ps_sio_adma>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200664 };
665
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100666 mca: mca {
667 compatible = "apple,t8103-mca", "apple,mca";
668 reg = <0x2 0x38400000 0x0 0x18000>,
669 <0x2 0x38300000 0x0 0x30000>;
670 reg-names = "clusters", "switch";
671 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
672 power-domains = <&ps_mca0>; //, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;
673 resets = <&ps_mca0>, <&ps_mca1>, <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200674
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100675 #sound-dai-cells = <1>;
676 apple,nclusters = <6>;
677 apple,mclk-range = <2600000 25000000>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200678
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100679 route {
680 dmas = <&admac 2>;
681 dma-names = "tx";
682 apple,serdes = <1>;
683 sound-dai = <&mca 0>;
684 };
Mark Kettenis3dfef532021-10-23 16:58:06 +0200685
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100686 route2 {
687 dmas = <&admac 6>;
688 dma-names = "tx";
689 apple,serdes = <3>;
690 sound-dai = <&mca 2>;
Mark Kettenis3dfef532021-10-23 16:58:06 +0200691 };
692 };
693 };
694};
Mark Kettenisc918e2c2022-01-10 20:58:42 +0100695
696#include "t8103-pmgr.dtsi"